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[PULL 05/52] z2: Make providing flash images non-mandatory
From: |
Peter Maydell |
Subject: |
[PULL 05/52] z2: Make providing flash images non-mandatory |
Date: |
Fri, 21 Feb 2020 13:06:53 +0000 |
From: Guenter Roeck <address@hidden>
Up to now, the z2 machine only boots if a flash image is provided.
This is not really necessary; the machine can boot from initrd or from
SD without it. At the same time, having to provide dummy flash images
is a nuisance and does not add any real value. Make it optional.
Signed-off-by: Guenter Roeck <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/z2.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index 34794fe3ae6..4bb237f22d2 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -314,12 +314,6 @@ static void z2_init(MachineState *machine)
be = 0;
#endif
dinfo = drive_get(IF_PFLASH, 0, 0);
- if (!dinfo && !qtest_enabled()) {
- error_report("Flash image must be given with the "
- "'pflash' parameter");
- exit(1);
- }
-
if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
sector_len, 4, 0, 0, 0, 0, be)) {
--
2.20.1
- [PULL 00/52] target-arm queue, Peter Maydell, 2020/02/21
- [PULL 01/52] aspeed/scu: Create separate write callbacks, Peter Maydell, 2020/02/21
- [PULL 02/52] aspeed/scu: Implement chip ID register, Peter Maydell, 2020/02/21
- [PULL 03/52] hw/misc/iotkit-secctl: Fix writing to 'PPC Interrupt Clear' register, Peter Maydell, 2020/02/21
- [PULL 04/52] mainstone: Make providing flash images non-mandatory, Peter Maydell, 2020/02/21
- [PULL 05/52] z2: Make providing flash images non-mandatory,
Peter Maydell <=
- [PULL 06/52] target/arm: Flush high bits of sve register after AdvSIMD EXT, Peter Maydell, 2020/02/21
- [PULL 07/52] target/arm: Flush high bits of sve register after AdvSIMD TBL/TBX, Peter Maydell, 2020/02/21
- [PULL 10/52] target/arm: Use bit 55 explicitly for pauth, Peter Maydell, 2020/02/21
- [PULL 11/52] target/arm: Fix select for aa64_va_parameters_both, Peter Maydell, 2020/02/21
- [PULL 08/52] target/arm: Flush high bits of sve register after AdvSIMD ZIP/UZP/TRN, Peter Maydell, 2020/02/21
- [PULL 09/52] target/arm: Flush high bits of sve register after AdvSIMD INS, Peter Maydell, 2020/02/21
- [PULL 12/52] target/arm: Remove ttbr1_valid check from get_phys_addr_lpae, Peter Maydell, 2020/02/21
- [PULL 15/52] target/arm: Check aa32_pan in take_aarch32_exception(), not aa64_pan, Peter Maydell, 2020/02/21
- [PULL 13/52] target/arm: Split out aa64_va_parameter_tbi, aa64_va_parameter_tbid, Peter Maydell, 2020/02/21
- [PULL 14/52] target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registers, Peter Maydell, 2020/02/21