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[PATCH v5 18/41] target/arm: Tidy ARMMMUIdx m-profile definitions
From: |
Richard Henderson |
Subject: |
[PATCH v5 18/41] target/arm: Tidy ARMMMUIdx m-profile definitions |
Date: |
Wed, 29 Jan 2020 15:55:51 -0800 |
Replace the magic numbers with the relevant ARM_MMU_IDX_M_* constants.
Keep the definitions short by referencing previous symbols.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/cpu.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 68ad96f8e8..3525b6425b 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2905,14 +2905,14 @@ typedef enum ARMMMUIdx {
ARMMMUIdx_SE10_0 = 4 | ARM_MMU_IDX_A,
ARMMMUIdx_SE10_1 = 5 | ARM_MMU_IDX_A,
ARMMMUIdx_Stage2 = 6 | ARM_MMU_IDX_A,
- ARMMMUIdx_MUser = 0 | ARM_MMU_IDX_M,
- ARMMMUIdx_MPriv = 1 | ARM_MMU_IDX_M,
- ARMMMUIdx_MUserNegPri = 2 | ARM_MMU_IDX_M,
- ARMMMUIdx_MPrivNegPri = 3 | ARM_MMU_IDX_M,
- ARMMMUIdx_MSUser = 4 | ARM_MMU_IDX_M,
- ARMMMUIdx_MSPriv = 5 | ARM_MMU_IDX_M,
- ARMMMUIdx_MSUserNegPri = 6 | ARM_MMU_IDX_M,
- ARMMMUIdx_MSPrivNegPri = 7 | ARM_MMU_IDX_M,
+ ARMMMUIdx_MUser = ARM_MMU_IDX_M,
+ ARMMMUIdx_MPriv = ARM_MMU_IDX_M | ARM_MMU_IDX_M_PRIV,
+ ARMMMUIdx_MUserNegPri = ARMMMUIdx_MUser | ARM_MMU_IDX_M_NEGPRI,
+ ARMMMUIdx_MPrivNegPri = ARMMMUIdx_MPriv | ARM_MMU_IDX_M_NEGPRI,
+ ARMMMUIdx_MSUser = ARMMMUIdx_MUser | ARM_MMU_IDX_M_S,
+ ARMMMUIdx_MSPriv = ARMMMUIdx_MPriv | ARM_MMU_IDX_M_S,
+ ARMMMUIdx_MSUserNegPri = ARMMMUIdx_MUserNegPri | ARM_MMU_IDX_M_S,
+ ARMMMUIdx_MSPrivNegPri = ARMMMUIdx_MPrivNegPri | ARM_MMU_IDX_M_S,
/* Indexes below here don't have TLBs and are used only for AT system
* instructions or for the first stage of an S12 page table walk.
*/
--
2.20.1
- [PATCH v5 08/41] target/arm: Simplify tlb_force_broadcast alternatives, (continued)
- [PATCH v5 08/41] target/arm: Simplify tlb_force_broadcast alternatives, Richard Henderson, 2020/01/29
- [PATCH v5 09/41] target/arm: Rename ARMMMUIdx*_S12NSE* to ARMMMUIdx*_E10_*, Richard Henderson, 2020/01/29
- [PATCH v5 11/41] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*, Richard Henderson, 2020/01/29
- [PATCH v5 14/41] target/arm: Rename ARMMMUIdx_S1E2 to ARMMMUIdx_E2, Richard Henderson, 2020/01/29
- [PATCH v5 12/41] target/arm: Rename ARMMMUIdx_S1SE[01] to ARMMMUIdx_SE10_[01], Richard Henderson, 2020/01/29
- [PATCH v5 13/41] target/arm: Rename ARMMMUIdx*_S1E3 to ARMMMUIdx*_SE3, Richard Henderson, 2020/01/29
- [PATCH v5 16/41] target/arm: Expand TBFLAG_ANY.MMUIDX to 4 bits, Richard Henderson, 2020/01/29
- [PATCH v5 15/41] target/arm: Recover 4 bits from TBFLAGs, Richard Henderson, 2020/01/29
- [PATCH v5 17/41] target/arm: Rearrange ARMMMUIdxBit, Richard Henderson, 2020/01/29
- [PATCH v5 10/41] target/arm: Rename ARMMMUIdx_S2NS to ARMMMUIdx_Stage2, Richard Henderson, 2020/01/29
- [PATCH v5 18/41] target/arm: Tidy ARMMMUIdx m-profile definitions,
Richard Henderson <=
- [PATCH v5 19/41] target/arm: Reorganize ARMMMUIdx, Richard Henderson, 2020/01/29
- [PATCH v5 20/41] target/arm: Add regime_has_2_ranges, Richard Henderson, 2020/01/29
- [PATCH v5 23/41] target/arm: Update aa64_zva_access for EL2, Richard Henderson, 2020/01/29
- [PATCH v5 21/41] target/arm: Update arm_mmu_idx for VHE, Richard Henderson, 2020/01/29
- [PATCH v5 22/41] target/arm: Update arm_sctlr for VHE, Richard Henderson, 2020/01/29
- [PATCH v5 25/41] target/arm: Add the hypervisor virtual counter, Richard Henderson, 2020/01/29
- [PATCH v5 24/41] target/arm: Update ctr_el0_access for EL2, Richard Henderson, 2020/01/29
- [PATCH v5 27/41] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE, Richard Henderson, 2020/01/29
- [PATCH v5 26/41] target/arm: Update timer access for VHE, Richard Henderson, 2020/01/29
- [PATCH v5 30/41] target/arm: Flush tlb for ASID changes in EL2&0 translation regime, Richard Henderson, 2020/01/29