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Re: [PATCH] riscv: Format Rd of FMV.W.X with NoN-boxing

From: Ian Jiang
Subject: Re: [PATCH] riscv: Format Rd of FMV.W.X with NoN-boxing
Date: Mon, 27 Jan 2020 22:17:35 +0800

Got it.
As the first step, I just summit a new patch:
[PATCH] riscv: Add helper to make NaN-boxing for FP register
I'd like to carry out other fixes after this patch is reviewed.

Richard Henderson <address@hidden> 于2020年1月24日周五 上午2:53写道:
> On 1/22/20 6:05 PM, Ian Jiang wrote:
> > But I am not clear where to call this new helper gen_nanbox_fpr(). Is
> > there a position that could affect all floating-point instructions? So
> > that we don't have to modify so many translating functions. Please
> > give more details.
> No, this will have to be called for each instruction individually.
> That said, all of the insns that use helper functions, such as fsqrt_s, should
> be doing the nan-boxing within the helper function.  Thus you'll want a
> different helper function for use within fpu_helper.c.
> r~

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