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Re: [PATCH v3 2/4] RISC-V: configure and turn on vector extension from c
From: |
Richard Henderson |
Subject: |
Re: [PATCH v3 2/4] RISC-V: configure and turn on vector extension from command line |
Date: |
Sat, 4 Jan 2020 10:08:21 +1100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 |
On 1/3/20 2:33 PM, LIU Zhiwei wrote:
> + if (cpu->cfg.ext_v) {
> + target_misa |= RVV;
> + if (!is_power_of_2(cpu->cfg.vlen)) {
> + error_setg(errp,
> + "Vector extension VLEN must be power of 2");
> + return;
> + }
> + if (cpu->cfg.vlen > RV_VLEN_MAX) {
> + error_setg(errp,
> + "Vector extension VLEN must <= %d", RV_VLEN_MAX);
> + return;
> + }
> + if (!is_power_of_2(cpu->cfg.elen)) {
> + error_setg(errp,
> + "Vector extension ELEN must be power of 2");
> + return;
> + }
Missing maximum on elen.
Missing minimum on vlen, which, as I discussed earlier, should be 128 to avoid
asserts in tcg-op-gvec.c.
> #define PRIV_VERSION_1_10_0 0x00011000
> #define PRIV_VERSION_1_11_0 0x00011100
>
> +#define VEXT_VERSION_0_07_1 0x00000071
To match the other version number formats, surely this should be 0x00000701.
r~