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[PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get
From: |
Peter Maydell |
Subject: |
[PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state |
Date: |
Tue, 22 Oct 2019 14:31:12 +0100 |
From: Richard Henderson <address@hidden>
We do not need to compute any of these values for M-profile.
Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two
sets must be mutually exclusive.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index ddd21edfcf1..e2a62cf19a0 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11235,21 +11235,28 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
}
} else {
flags = rebuild_hflags_a32(env, fp_el, mmu_idx);
+
+ /*
+ * Note that XSCALE_CPAR shares bits with VECSTRIDE.
+ * Note that VECLEN+VECSTRIDE are RES0 for M-profile.
+ */
+ if (arm_feature(env, ARM_FEATURE_XSCALE)) {
+ flags = FIELD_DP32(flags, TBFLAG_A32,
+ XSCALE_CPAR, env->cp15.c15_cpar);
+ } else {
+ flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN,
+ env->vfp.vec_len);
+ flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE,
+ env->vfp.vec_stride);
+ }
}
flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
- flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
- flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride);
flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits);
if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)
|| arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
}
- /* Note that XSCALE_CPAR shares bits with VECSTRIDE */
- if (arm_feature(env, ARM_FEATURE_XSCALE)) {
- flags = FIELD_DP32(flags, TBFLAG_A32,
- XSCALE_CPAR, env->cp15.c15_cpar);
- }
}
/* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
--
2.20.1
- [PULL 09/41] hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API, (continued)
- [PULL 09/41] hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/22
- [PULL 10/41] hw/m68k/mcf5208.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/22
- [PULL 11/41] target/arm: Split out rebuild_hflags_common, Peter Maydell, 2019/10/22
- [PULL 13/41] target/arm: Split out rebuild_hflags_common_32, Peter Maydell, 2019/10/22
- [PULL 12/41] target/arm: Split out rebuild_hflags_a64, Peter Maydell, 2019/10/22
- [PULL 14/41] target/arm: Split arm_cpu_data_is_big_endian, Peter Maydell, 2019/10/22
- [PULL 16/41] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 15/41] target/arm: Split out rebuild_hflags_m32, Peter Maydell, 2019/10/22
- [PULL 17/41] target/arm: Split out rebuild_hflags_a32, Peter Maydell, 2019/10/22
- [PULL 18/41] target/arm: Split out rebuild_hflags_aprofile, Peter Maydell, 2019/10/22
- [PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state,
Peter Maydell <=
- [PULL 20/41] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 22/41] target/arm: Add arm_rebuild_hflags, Peter Maydell, 2019/10/22
- [PULL 21/41] target/arm: Hoist computation of TBFLAG_A32.VFPEN, Peter Maydell, 2019/10/22
- [PULL 23/41] target/arm: Split out arm_mmu_idx_el, Peter Maydell, 2019/10/22
- [PULL 25/41] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}), Peter Maydell, 2019/10/22
- [PULL 24/41] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 26/41] target/arm: Rebuild hflags at EL changes, Peter Maydell, 2019/10/22
- [PULL 27/41] target/arm: Rebuild hflags at MSR writes, Peter Maydell, 2019/10/22
- [PULL 28/41] target/arm: Rebuild hflags at CPSR writes, Peter Maydell, 2019/10/22
- [PULL 29/41] target/arm: Rebuild hflags at Xscale SCTLR writes, Peter Maydell, 2019/10/22