[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 22/41] target/arm: Add arm_rebuild_hflags
From: |
Peter Maydell |
Subject: |
[PULL 22/41] target/arm: Add arm_rebuild_hflags |
Date: |
Tue, 22 Oct 2019 14:31:15 +0100 |
From: Richard Henderson <address@hidden>
This function assumes nothing about the current state of the cpu,
and writes the computed value to env->hflags.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 6 ++++++
target/arm/helper.c | 30 ++++++++++++++++++++++--------
2 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 9909ff89d4f..d844ea21d8d 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3297,6 +3297,12 @@ void arm_register_pre_el_change_hook(ARMCPU *cpu,
ARMELChangeHookFn *hook,
void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook, void
*opaque);
+/**
+ * arm_rebuild_hflags:
+ * Rebuild the cached TBFLAGS for arbitrary changed processor state.
+ */
+void arm_rebuild_hflags(CPUARMState *env);
+
/**
* aa32_vfp_dreg:
* Return a pointer to the Dn register within env in 32-bit mode.
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 89aa6fd9339..85de96d071a 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11198,17 +11198,35 @@ static uint32_t rebuild_hflags_a64(CPUARMState *env,
int el, int fp_el,
return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
}
+static uint32_t rebuild_hflags_internal(CPUARMState *env)
+{
+ int el = arm_current_el(env);
+ int fp_el = fp_exception_el(env, el);
+ ARMMMUIdx mmu_idx = arm_mmu_idx(env);
+
+ if (is_a64(env)) {
+ return rebuild_hflags_a64(env, el, fp_el, mmu_idx);
+ } else if (arm_feature(env, ARM_FEATURE_M)) {
+ return rebuild_hflags_m32(env, fp_el, mmu_idx);
+ } else {
+ return rebuild_hflags_a32(env, fp_el, mmu_idx);
+ }
+}
+
+void arm_rebuild_hflags(CPUARMState *env)
+{
+ env->hflags = rebuild_hflags_internal(env);
+}
+
void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *pflags)
{
- ARMMMUIdx mmu_idx = arm_mmu_idx(env);
- int current_el = arm_current_el(env);
- int fp_el = fp_exception_el(env, current_el);
uint32_t flags, pstate_for_ss;
+ flags = rebuild_hflags_internal(env);
+
if (is_a64(env)) {
*pc = env->pc;
- flags = rebuild_hflags_a64(env, current_el, fp_el, mmu_idx);
if (cpu_isar_feature(aa64_bti, env_archcpu(env))) {
flags = FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype);
}
@@ -11217,8 +11235,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
*pc = env->regs[15];
if (arm_feature(env, ARM_FEATURE_M)) {
- flags = rebuild_hflags_m32(env, fp_el, mmu_idx);
-
if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S)
!= env->v7m.secure) {
@@ -11242,8 +11258,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1);
}
} else {
- flags = rebuild_hflags_a32(env, fp_el, mmu_idx);
-
/*
* Note that XSCALE_CPAR shares bits with VECSTRIDE.
* Note that VECLEN+VECSTRIDE are RES0 for M-profile.
--
2.20.1
- [PULL 11/41] target/arm: Split out rebuild_hflags_common, (continued)
- [PULL 11/41] target/arm: Split out rebuild_hflags_common, Peter Maydell, 2019/10/22
- [PULL 13/41] target/arm: Split out rebuild_hflags_common_32, Peter Maydell, 2019/10/22
- [PULL 12/41] target/arm: Split out rebuild_hflags_a64, Peter Maydell, 2019/10/22
- [PULL 14/41] target/arm: Split arm_cpu_data_is_big_endian, Peter Maydell, 2019/10/22
- [PULL 16/41] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 15/41] target/arm: Split out rebuild_hflags_m32, Peter Maydell, 2019/10/22
- [PULL 17/41] target/arm: Split out rebuild_hflags_a32, Peter Maydell, 2019/10/22
- [PULL 18/41] target/arm: Split out rebuild_hflags_aprofile, Peter Maydell, 2019/10/22
- [PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 20/41] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 22/41] target/arm: Add arm_rebuild_hflags,
Peter Maydell <=
- [PULL 21/41] target/arm: Hoist computation of TBFLAG_A32.VFPEN, Peter Maydell, 2019/10/22
- [PULL 23/41] target/arm: Split out arm_mmu_idx_el, Peter Maydell, 2019/10/22
- [PULL 25/41] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}), Peter Maydell, 2019/10/22
- [PULL 24/41] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 26/41] target/arm: Rebuild hflags at EL changes, Peter Maydell, 2019/10/22
- [PULL 27/41] target/arm: Rebuild hflags at MSR writes, Peter Maydell, 2019/10/22
- [PULL 28/41] target/arm: Rebuild hflags at CPSR writes, Peter Maydell, 2019/10/22
- [PULL 29/41] target/arm: Rebuild hflags at Xscale SCTLR writes, Peter Maydell, 2019/10/22
- [PULL 30/41] target/arm: Rebuild hflags for M-profile, Peter Maydell, 2019/10/22
- [PULL 31/41] target/arm: Rebuild hflags for M-profile NVIC, Peter Maydell, 2019/10/22