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Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)


From: Libo Zhou
Subject: Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)
Date: Wed, 18 Sep 2019 12:08:03 +0800

Alex Bennée writes:

> You will need to update gdb-xml/$ARCH.xml and the appropriate
arch_read/write register functions in gdbstub.



For some mysterious reason my previous emails didn't go to the list 
successfully. Let me try sending this one without including any code or link.



The MIPS target doesn't have mips*.xml, so I tried implementing it myself. As 
per the "Standard Target Features" requirement by GDB, I created mips-cpu.xml, 
mips-cp0.xml, mips-fpu.xml, and finally included them all in a wrapper 
mips.xml. Essentially I followed this commit: 
b8158192fadb3e346372456c25cbbc4be584a85c. (Yes it failed because <feature> is 
nested in <feature>, so I nest <feature> in <target>.)


Unfortunately, it doesn't work. GDB just doesn't recognize my change. It still 
displays the default reg names (zero, at, v0, v1, a0, a1, etc.), but I want my 
r0, r1, ... r31.


So, I went to the i386 target, whose gdbstub is working properly, and tweaked 
with its xml to see if changing xml reg names reflects in GDB session. However, 
when I changed "rax" to "zax", GDB gave me a 'g' packet error. I am really 
stuck at this point.


I really want to post my git diff below, but let's see if my mail can go to the 
list this time. Sorry for the inconvenience.



Cheers,

Libo Zhou


P.S. The dynamic xml generation option is too difficult for me for now. I will 
save it as an alternative in the future.

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