Re: [Qemu-devel] [PATCH v2 19/68] target/arm: Convert T32 ADDW/SUBW

[Richard Henderson]

On 8/23/19 7:47 AM, Peter Maydell wrote:
> On Fri, 23 Aug 2019 at 15:45, Richard Henderson
> <address@hidden> wrote:
>>
>> On 8/23/19 6:04 AM, Peter Maydell wrote:
>>>> +&ri              rd imm
>>>>  &r               rm
>>>>  &i               imm
>>>>  &msr_reg         rn r mask
>>>
>>> Should this change be in some other patch ?
>>
>> No, it's used by ADR.
>>
>>>> +  ADR            1111 0.1 0000 0 1111 0 ... rd:4 ........ \
>>>> +                 &ri imm=%imm12_26_12_0
>>
>> ... here.
> 
> This is in t32.decode, which has its own definition of &ri.
> The one I was asking about was the one in a32.decode -- the
> addition of that line is the only change to a32.decode in this patch.

a32.decode is where all of the shared argument sets are declared; t32.decode
gets the !extern markup.  If I only put it in t32.decode now, I'd only have to
move it later.  It will eventually be used in a32.decode by MOVW/MOVT.


r~