[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 20/44] spapr/xive: Sanity checks of OV5 during CAS
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 20/44] spapr/xive: Sanity checks of OV5 during CAS |
Date: |
Wed, 29 May 2019 16:49:53 +1000 |
From: Greg Kurz <address@hidden>
If a machine is started with ic-mode=xive but the guest only knows
about XICS, eg. an RHEL 7.6 guest, the kernel panics. This is
expected but a bit unfortunate since the crash doesn't provide
much information for the end user to guess what's happening.
Detect that during CAS and exit QEMU with a proper error message
instead, like it is already done for the MMU.
Even if this is less likely to happen, the opposite case of a guest
that only knows about XIVE would certainly fail all the same if the
machine is started with ic-mode=xics.
Also, the only valid values a guest can pass in byte 23 of OV5 during
CAS are 0b00 (XIVE legacy mode) and 0b01 (XIVE exploitation mode). Any
other value is a bug, at least with the current spec. Again, it does
not seem right to let the guest go on without a precise idea of the
interrupt mode it asked for.
Handle these cases as well.
Reported-by: Satheesh Rajendran <address@hidden>
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_hcall.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 6c16d2b120..63a55614b8 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1513,6 +1513,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu,
bool guest_radix;
Error *local_err = NULL;
bool raw_mode_supported = false;
+ bool guest_xive;
cas_pvr = cas_check_pvr(spapr, cpu, &addr, &raw_mode_supported,
&local_err);
if (local_err) {
@@ -1545,10 +1546,17 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu,
error_report("guest requested hash and radix MMU, which is invalid.");
exit(EXIT_FAILURE);
}
+ if (spapr_ovec_test(ov5_guest, OV5_XIVE_BOTH)) {
+ error_report("guest requested an invalid interrupt mode");
+ exit(EXIT_FAILURE);
+ }
+
/* The radix/hash bit in byte 24 requires special handling: */
guest_radix = spapr_ovec_test(ov5_guest, OV5_MMU_RADIX_300);
spapr_ovec_clear(ov5_guest, OV5_MMU_RADIX_300);
+ guest_xive = spapr_ovec_test(ov5_guest, OV5_XIVE_EXPLOIT);
+
/*
* HPT resizing is a bit of a special case, because when enabled
* we assume an HPT guest will support it until it says it
@@ -1632,6 +1640,22 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu,
ov5_updates) != 0);
}
+ /*
+ * Ensure the guest asks for an interrupt mode we support; otherwise
+ * terminate the boot.
+ */
+ if (guest_xive) {
+ if (spapr->irq->ov5 == SPAPR_OV5_XIVE_LEGACY) {
+ error_report("Guest requested unavailable interrupt mode (XIVE)");
+ exit(EXIT_FAILURE);
+ }
+ } else {
+ if (spapr->irq->ov5 == SPAPR_OV5_XIVE_EXPLOIT) {
+ error_report("Guest requested unavailable interrupt mode (XICS)");
+ exit(EXIT_FAILURE);
+ }
+ }
+
/*
* Generate a machine reset when we have an update of the
* interrupt mode. Only required when the machine supports both
--
2.21.0
- [Qemu-devel] [PULL 12/44] target/ppc: Fix vsum2sws, (continued)
- [Qemu-devel] [PULL 12/44] target/ppc: Fix vsum2sws, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 16/44] spapr/xive: print out the EQ page address in the monitor, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 11/44] target/ppc: Fix vslv and vsrv, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 24/44] spapr: Fix phb_placement backwards compatibility, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 07/44] hw/ppc/40p: use 1900 as a base year, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 09/44] target/ppc: Fix xvxsigdp, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 17/44] Fix typo on "info pic" monitor cmd output for xive, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 06/44] hw/ppc/40p: Move the MC146818 RTC to the board where it belongs, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 05/44] hw/ppc/prep: use TYPE_MC146818_RTC instead of a hardcoded string, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 15/44] spapr/xive: fix EQ page addresses above 64GB, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 20/44] spapr/xive: Sanity checks of OV5 during CAS,
David Gibson <=
- [Qemu-devel] [PULL 26/44] spapr/xive: add KVM support, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 28/44] spapr/xive: add state synchronization with KVM, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 25/44] spapr: Print out extra hints when CAS negotiation of interrupt mode fails, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 19/44] target/ppc: Fix xvabs[sd]p, xvnabs[sd]p, xvneg[sd]p, xvcpsgn[sd]p, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 21/44] target/ppc: Set PSSCR_EC on cpu halt to prevent spurious wakeup, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 23/44] target/ppc: Use vector variable shifts for VSL, VSR, VSRA, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 18/44] target/ppc: Optimise VSX_LOAD_SCALAR_DS and VSX_VECTOR_LOAD_STORE, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 34/44] spapr: check for the activation of the KVM IRQ device, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 29/44] spapr/xive: introduce a VM state change handler, David Gibson, 2019/05/29
- [Qemu-devel] [PULL 22/44] spapr: Add forgotten capability to migration stream, David Gibson, 2019/05/29