Re: [Qemu-devel] Headers without multiple inclusion guards

[Peter Maydell]

On Tue, 28 May 2019 at 19:12, Markus Armbruster <address@hidden> wrote:
> I append the alphabetical list of headers without multiple inclusion
> guards (as reported by scripts/clean-header-guards -nv), followed by the
> same list sorted into maintainer buckets.  If you're cc'ed, please find
> your bucket(s), and tell me which headers intentionally lack guards.

> FPU emulation
> M: Aurelien Jarno <address@hidden>
> M: Peter Maydell <address@hidden>
> M: Alex Bennée <address@hidden>
> fpu/softfloat-specialize.h
> include/fpu/softfloat-macros.h

I think that include/fpu/softfloat-macros.h should ideally
have header guards.

fpu/softfloat-specialize.h is a bit odd as it's intended to be included
exactly once, by fpu/softfloat.c. Guards wouldn't hurt, I think, but it
might be cleanest to rename it to fpu/softfloat-specialize.inc.c
to match our convention for "lump of C which is textually
included but isn't a header".

> ARM
> M: Peter Maydell <address@hidden>
> target/arm/helper-a64.h
> target/arm/helper-sve.h
> target/arm/helper.h
> target/arm/op_addsub.h

All intentional -- target/*/helper.h and anything it includes
is intended to be included multiple times for different
purposes (the includer #defines various macros appropriately
to produce different effects).

> Allwinner-a10
> M: Beniamino Galvani <address@hidden>
> M: Peter Maydell <address@hidden>
> include/hw/arm/allwinner-a10.h

This appears to me to have an include guard:
perhaps your check doesn't recognize the variant
where the #define appears just before the #endif rather
than just after the #ifndef ?

> ARM PrimeCell and CMSDK devices
> M: Peter Maydell <address@hidden>
> hw/display/pl110_template.h

Intentional, like all the hw/display/*_template.h headers:
they're included multiple times with various definitions
of BITS to generate different functions. (Note that there's
an item on the BiteSizedTasks page which suggests that
we could clean up all of these because only the 32-bit
case is used now that our display surfaces are always
32-bits-per-pixel.)

> Raspberry Pi
> M: Peter Maydell <address@hidden>
> R: Andrew Baumann <address@hidden>
> R: Philippe Mathieu-Daudé <address@hidden>
> include/hw/arm/raspi_platform.h

Mistake, should have a guard.

> PXA2XX
> M: Andrzej Zaborowski <address@hidden>
> M: Peter Maydell <address@hidden>
> hw/display/pxa2xx_template.h

Intentional, see above.

> Xilinx ZynqMP
> M: Alistair Francis <address@hidden>
> M: Edgar E. Iglesias <address@hidden>
> M: Peter Maydell <address@hidden>
> include/hw/arm/xlnx-zynqmp.h
> include/hw/display/xlnx_dp.h
> include/hw/dma/xlnx-zynq-devcfg.h

These all have guards in non-standard formats.

> include/hw/timer/xlnx-zynqmp-rtc.h

Mistake, should have a guard.

> OMAP
> M: Peter Maydell <address@hidden>
> hw/display/omap_lcd_template.h

Intentional, see above.

> include/hw/arm/omap.h

Has a guard in a non-standard form.

> UNMAINTAINED
> ------------
> hw/display/tc6393xb_template.h

Intentional (see above)

> include/hw/char/cadence_uart.h

Another with a guard which isn't of a style your check
detects.

thanks
-- PMM