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Re: [Qemu-devel] [PATCH] Incorrect Stack Pointer shadow register support


From: no-reply
Subject: Re: [Qemu-devel] [PATCH] Incorrect Stack Pointer shadow register support on some m68k CPUs
Date: Sun, 26 May 2019 00:45:19 -0700 (PDT)

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Type: series
Subject: [Qemu-devel] [PATCH] Incorrect Stack Pointer shadow register support 
on some m68k CPUs

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
2fa92e8d86 Incorrect Stack Pointer shadow register support on some m68k CPUs

=== OUTPUT BEGIN ===
ERROR: Author email address is mangled by the mailing list
#2: 
Author: Lucien Murray-Pitts via Qemu-devel <address@hidden>

WARNING: Block comments use a leading /* on a separate line
#46: FILE: target/m68k/cpu.h:465:
+/* The ColdFire core ISA is a RISC-style reduction of the 68000 series

WARNING: Block comments use * on subsequent lines
#47: FILE: target/m68k/cpu.h:466:
+/* The ColdFire core ISA is a RISC-style reduction of the 68000 series
+   Whilst the 68000 flourished by adding extended stack/instructions in

total: 1 errors, 2 warnings, 44 lines checked

Commit 2fa92e8d8620 (Incorrect Stack Pointer shadow register support on some 
m68k CPUs) has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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