[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 2/4] Categorize devices: IGD passthrough ISA bridge
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 2/4] Categorize devices: IGD passthrough ISA bridge |
Date: |
Thu, 25 Apr 2019 15:13:40 -0300 |
From: Ernest Esene <address@hidden>
Set category for the device.
Signed-off-by: Ernest Esene <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
[ehabkost: edited commit message]
Signed-off-by: Eduardo Habkost <address@hidden>
---
hw/i386/pc_piix.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 8ad8e885c6..03a9cb8af3 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -911,6 +911,7 @@ static void isa_bridge_class_init(ObjectClass *klass, void
*data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
dc->desc = "ISA bridge faked to support IGD PT";
+ set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
k->vendor_id = PCI_VENDOR_ID_INTEL;
k->class_id = PCI_CLASS_BRIDGE_ISA;
};
--
2.18.0.rc1.1.g3f1ff2140
- [Qemu-devel] [PULL 0/4] x86 queue, 2019-04-25, Eduardo Habkost, 2019/04/25
- [Qemu-devel] [PULL 1/4] i386: Add new Hygon 'Dhyana' CPU model, Eduardo Habkost, 2019/04/25
- [Qemu-devel] [PULL 2/4] Categorize devices: IGD passthrough ISA bridge,
Eduardo Habkost <=
- [Qemu-devel] [PULL 3/4] Categorize devices: iommu, Eduardo Habkost, 2019/04/25
- [Qemu-devel] [PULL 4/4] Pass through cache information for TOPOEXT CPUs, Eduardo Habkost, 2019/04/25
- Re: [Qemu-devel] [PULL 0/4] x86 queue, 2019-04-25, Peter Maydell, 2019/04/27