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[Qemu-devel] [PULL 0/4] x86 queue, 2019-04-25
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 0/4] x86 queue, 2019-04-25 |
Date: |
Thu, 25 Apr 2019 15:13:38 -0300 |
The following changes since commit 3284aa128153750f14a61e8a96fd085e6f2999b6:
Merge remote-tracking branch 'remotes/lersek/tags/edk2-pull-2019-04-22' into
staging (2019-04-24 13:19:41 +0100)
are available in the Git repository at:
git://github.com/ehabkost/qemu.git tags/x86-next-pull-request
for you to fetch changes up to a4e0b436f44a4bb47ed4a75b0c05d2547cf12b1c:
Pass through cache information for TOPOEXT CPUs (2019-04-25 14:52:28 -0300)
----------------------------------------------------------------
x86 queue, 2019-04-25
* Hygon Dhyana CPU model (Pu Wen)
* Categorize a few devices in hw/i386 (Ernest Esene)
* Support host-cache-info on TOPOEXT CPUID leaf (Stanislav Lanci)
----------------------------------------------------------------
Ernest Esene (2):
Categorize devices: IGD passthrough ISA bridge
Categorize devices: iommu
Pu Wen (1):
i386: Add new Hygon 'Dhyana' CPU model
Stanislav Lanci (1):
Pass through cache information for TOPOEXT CPUs
target/i386/cpu.h | 2 ++
hw/i386/amd_iommu.c | 2 ++
hw/i386/intel_iommu.c | 2 ++
hw/i386/pc_piix.c | 1 +
target/i386/cpu.c | 54 +++++++++++++++++++++++++++++++++++++++++++
5 files changed, 61 insertions(+)
--
2.18.0.rc1.1.g3f1ff2140
- [Qemu-devel] [PULL 0/4] x86 queue, 2019-04-25,
Eduardo Habkost <=
- [Qemu-devel] [PULL 1/4] i386: Add new Hygon 'Dhyana' CPU model, Eduardo Habkost, 2019/04/25
- [Qemu-devel] [PULL 2/4] Categorize devices: IGD passthrough ISA bridge, Eduardo Habkost, 2019/04/25
- [Qemu-devel] [PULL 3/4] Categorize devices: iommu, Eduardo Habkost, 2019/04/25
- [Qemu-devel] [PULL 4/4] Pass through cache information for TOPOEXT CPUs, Eduardo Habkost, 2019/04/25
- Re: [Qemu-devel] [PULL 0/4] x86 queue, 2019-04-25, Peter Maydell, 2019/04/27