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[Qemu-devel] [PULL 54/60] ppc/pnv: activate XSCOM tests for POWER9
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 54/60] ppc/pnv: activate XSCOM tests for POWER9 |
Date: |
Sun, 10 Mar 2019 19:26:57 +1100 |
From: Cédric Le Goater <address@hidden>
We now have enough support to let the XSCOM test run on POWER9.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
tests/pnv-xscom-test.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/tests/pnv-xscom-test.c b/tests/pnv-xscom-test.c
index 974f8da5b2..63d464048d 100644
--- a/tests/pnv-xscom-test.c
+++ b/tests/pnv-xscom-test.c
@@ -39,7 +39,6 @@ static const PnvChip pnv_chips[] = {
.cfam_id = 0x120d304980000000ull,
.first_core = 0x1,
},
-#if 0 /* POWER9 support is not ready yet */
{
.chip_type = PNV_CHIP_POWER9,
.cpu_model = "POWER9",
@@ -47,7 +46,6 @@ static const PnvChip pnv_chips[] = {
.cfam_id = 0x220d104900008000ull,
.first_core = 0x0,
},
-#endif
};
static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
--
2.20.1
- [Qemu-devel] [PULL 33/60] spapr_iommu: Do not replay mappings from just created DMA window, (continued)
- [Qemu-devel] [PULL 33/60] spapr_iommu: Do not replay mappings from just created DMA window, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 43/60] ppc/pnv: add a PSI bridge class model, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 56/60] ppc/pnv: add a "ibm, opal/power-mgt" device tree node on POWER9, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 39/60] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 47/60] ppc/pnv: add a 'dt_isa_nodename' to the chip, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 49/60] ppc/pnv: add SerIRQ routing registers, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 50/60] ppc/pnv: add a OCC model class, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 59/60] target/ppc: Optimize x[sv]xsigdp using deposit_i64(), David Gibson, 2019/03/10
- [Qemu-devel] [PULL 58/60] target/ppc: Optimize xviexpdp() using deposit_i64(), David Gibson, 2019/03/10
- [Qemu-devel] [PULL 45/60] ppc/pnv: lpc: fix OPB address ranges, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 54/60] ppc/pnv: activate XSCOM tests for POWER9,
David Gibson <=
- [Qemu-devel] [PULL 16/60] PPC: E500: Update u-boot to v2019.01, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 44/60] ppc/pnv: add a PSI bridge model for POWER9, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 51/60] ppc/pnv: add a OCC model for POWER9, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 55/60] ppc/pnv: add more dummy XSCOM addresses, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 48/60] ppc/pnv: add a LPC Controller model for POWER9, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 52/60] ppc/pnv: extend XSCOM core support for POWER9, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 46/60] ppc/pnv: add a LPC Controller class model, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 53/60] ppc/pnv: POWER9 XSCOM quad support, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 57/60] target/ppc: add HV support for POWER9, David Gibson, 2019/03/10