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Re: [Qemu-devel] [PATCH v2 0/7] target/ppc: switch fpr/vsrl registers so
From: |
Mark Cave-Ayland |
Subject: |
Re: [Qemu-devel] [PATCH v2 0/7] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order |
Date: |
Thu, 7 Mar 2019 21:27:56 +0000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 |
On 07/03/2019 21:00, Richard Henderson wrote:
> On 3/7/19 10:05 AM, Mark Cave-Ayland wrote:
>> Finally now that all VSX registers are stored in the same way, the vsr offset
>> functions and get_cpu_vsrh()/get_cpu_vsrl() can be simplified accordingly.
>
> For the todo list for 4.1 should be getting rid of getVSR and setVSR.
That's something that certainly crossed my mind, although I was conscious that
freeze
was coming up and wanted to get the fix for the existing VSX vector ops merged.
I
think it should be a simple mechanical change, but I'm not real set up right
now for
much in the way of ppc64 testing.
ATB,
Mark.
- Re: [Qemu-devel] [PATCH v2 3/7] target/ppc: move Vsr* macros from internal.h to cpu.h, (continued)
- [Qemu-devel] [PATCH v2 7/7] target/ppc: introduce vsr64_offset() to simplify get_cpu_vsr{l, h}() and set_cpu_vsr{l, h}(), Mark Cave-Ayland, 2019/03/07
- [Qemu-devel] [PATCH v2 1/7] target/ppc: introduce single fpr_offset() function, Mark Cave-Ayland, 2019/03/07
- [Qemu-devel] [PATCH v2 4/7] target/ppc: introduce avr_full_offset() function, Mark Cave-Ayland, 2019/03/07
- [Qemu-devel] [PATCH v2 6/7] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order, Mark Cave-Ayland, 2019/03/07
- Re: [Qemu-devel] [PATCH v2 0/7] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order, Richard Henderson, 2019/03/07
- Re: [Qemu-devel] [PATCH v2 0/7] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order,
Mark Cave-Ayland <=
- Re: [Qemu-devel] [PATCH v2 0/7] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order, David Gibson, 2019/03/07