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[Qemu-devel] [PULL 12/27] MAINTAINERS: Remove Peter Crosthwaite from var
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 12/27] MAINTAINERS: Remove Peter Crosthwaite from various entries |
Date: |
Thu, 14 Feb 2019 19:05:48 +0000 |
Peter Crosthwaite hasn't had the bandwidth to do code review or
other QEMU work for some time now -- remove his email address
from MAINTAINERS file entries so we don't bombard him with
patch emails.
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
---
MAINTAINERS | 4 ----
1 file changed, 4 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index e170a4c7337..ffb029f63ac 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -110,7 +110,6 @@ Guest CPU cores (TCG):
----------------------
Overall
L: address@hidden
-M: Peter Crosthwaite <address@hidden>
M: Richard Henderson <address@hidden>
R: Paolo Bonzini <address@hidden>
S: Maintained
@@ -1345,7 +1344,6 @@ F: tests/virtio-scsi-test.c
T: git https://github.com/bonzini/qemu.git scsi-next
SSI
-M: Peter Crosthwaite <address@hidden>
M: Alistair Francis <address@hidden>
S: Maintained
F: hw/ssi/*
@@ -1356,7 +1354,6 @@ F: tests/m25p80-test.c
Xilinx SPI
M: Alistair Francis <address@hidden>
-M: Peter Crosthwaite <address@hidden>
S: Maintained
F: hw/ssi/xilinx_*
@@ -1766,7 +1763,6 @@ F: qom/cpu.c
F: include/qom/cpu.h
Device Tree
-M: Peter Crosthwaite <address@hidden>
M: Alexander Graf <address@hidden>
S: Maintained
F: device_tree.c
--
2.20.1
- [Qemu-devel] [PULL 01/27] target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR, (continued)
- [Qemu-devel] [PULL 01/27] target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 02/27] target/arm: Implement HACR_EL2, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 03/27] target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 04/27] target/arm: Force result size into dp after operation, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 05/27] target/arm: Restructure disas_fp_int_conv, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 06/27] target/arm: relax permission checks for HWCAP_CPUID registers, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 07/27] target/arm: expose CPUID registers to userspace, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 08/27] target/arm: expose MPIDR_EL1 to userspace, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 09/27] target/arm: expose remaining CPUID registers as RAZ, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 10/27] linux-user/elfload: enable HWCAP_CPUID for AArch64, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 12/27] MAINTAINERS: Remove Peter Crosthwaite from various entries,
Peter Maydell <=
- [Qemu-devel] [PULL 15/27] target/arm: Rely on optimization within tcg_gen_gvec_or, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 19/27] target/arm: Remove neon min/max helpers, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 14/27] hw/arm/armsse: Fix miswiring of expansion IRQs, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 13/27] hw/intc/armv7m_nvic: Allow byte accesses to SHPR1, Peter Maydell, 2019/02/14
- [Qemu-devel] [PULL 11/27] arm: Allow system registers for KVM guests to be changed by QEMU code, Peter Maydell, 2019/02/14