Re: [Qemu-devel] [PATCH 11/34] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access

[Mark Cave-Ayland]

On 19/12/2018 12:29, Mark Cave-Ayland wrote:

> On 19/12/2018 06:15, David Gibson wrote:
> 
>> On Mon, Dec 17, 2018 at 10:38:48PM -0800, Richard Henderson wrote:
>>> From: Mark Cave-Ayland <address@hidden>
>>>
>>> These helpers allow us to move FP register values to/from the specified 
>>> TCGv_i64
>>> argument in the VSR helpers to be introduced shortly.
>>>
>>> To prevent FP helpers accessing the cpu_fpr array directly, add extra TCG
>>> temporaries as required.
>>>
>>> Signed-off-by: Mark Cave-Ayland <address@hidden>
>>> Message-Id: <address@hidden>
>>
>> Acked-by: David Gibson <address@hidden>
>>
>> Do you want me to take these, or will you take them via your tree?
> 
> Well as discussed yesterday with Richard, I've already found another couple 
> of bugs
> in this version: a sign-extension bug, plus some leaking temporaries so there 
> will at
> least need to be a v3 of my patches.
> 
> I'm wondering if it makes sense for me to pass the 2 vector operation 
> conversion
> patches over to Richard, and for you to take my v3 patchset that does all the
> groundwork separately first?

So this is the approach I've gone for - I've dropped my TCG vector conversion 
patches
from the previous iteration, and posted v3 with all my latest fixes as a 
separate
"prepare for conversion to TCG vector operations" patchset.

Richard - I've rebased your "tcg, target/ppc vector improvements" patchset on 
top of
my v3 patchset and pushed to 
https://github.com/mcayland/qemu/commits/ppc-altivec-rth
to make it easier for us both to test.

Note that the 2 TCG vector conversion patches I originally created for v2 are 
now
included as part of your patchset instead (including a squash of your 
"target/ppc:
nand, nor, eqv are now generic vector operations" patch).


ATB,

Mark.