Re: [Qemu-devel] [PATCH 01/34] tcg: Add logical simplifications during gvec expand

[David Gibson]

On Mon, Dec 17, 2018 at 10:38:38PM -0800, Richard Henderson wrote:
> We handle many of these during integer expansion, and the
> rest of them during integer optimization.
> 
> Signed-off-by: Richard Henderson <address@hidden>

Reviewed-by: David Gibson <address@hidden>

> ---
>  tcg/tcg-op-gvec.c | 35 ++++++++++++++++++++++++++++++-----
>  1 file changed, 30 insertions(+), 5 deletions(-)
> 
> diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
> index 61c25f5784..ec231b78fb 100644
> --- a/tcg/tcg-op-gvec.c
> +++ b/tcg/tcg-op-gvec.c
> @@ -1840,7 +1840,12 @@ void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, 
> uint32_t aofs,
>          .opc = INDEX_op_and_vec,
>          .prefer_i64 = TCG_TARGET_REG_BITS == 64,
>      };
> -    tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +
> +    if (aofs == bofs) {
> +        tcg_gen_gvec_mov(vece, dofs, aofs, oprsz, maxsz);
> +    } else {
> +        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +    }
>  }
>  
>  void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
> @@ -1853,7 +1858,12 @@ void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, 
> uint32_t aofs,
>          .opc = INDEX_op_or_vec,
>          .prefer_i64 = TCG_TARGET_REG_BITS == 64,
>      };
> -    tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +
> +    if (aofs == bofs) {
> +        tcg_gen_gvec_mov(vece, dofs, aofs, oprsz, maxsz);
> +    } else {
> +        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +    }
>  }
>  
>  void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,
> @@ -1866,7 +1876,12 @@ void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, 
> uint32_t aofs,
>          .opc = INDEX_op_xor_vec,
>          .prefer_i64 = TCG_TARGET_REG_BITS == 64,
>      };
> -    tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +
> +    if (aofs == bofs) {
> +        tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, 0);
> +    } else {
> +        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +    }
>  }
>  
>  void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,
> @@ -1879,7 +1894,12 @@ void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, 
> uint32_t aofs,
>          .opc = INDEX_op_andc_vec,
>          .prefer_i64 = TCG_TARGET_REG_BITS == 64,
>      };
> -    tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +
> +    if (aofs == bofs) {
> +        tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, 0);
> +    } else {
> +        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +    }
>  }
>  
>  void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
> @@ -1892,7 +1912,12 @@ void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, 
> uint32_t aofs,
>          .opc = INDEX_op_orc_vec,
>          .prefer_i64 = TCG_TARGET_REG_BITS == 64,
>      };
> -    tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +
> +    if (aofs == bofs) {
> +        tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, -1);
> +    } else {
> +        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
> +    }
>  }
>  
>  static const GVecGen2s gop_ands = {

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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