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[Qemu-devel] [PATCH 19/34] target/ppc: convert vspltis[bhw] to use vecto
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 19/34] target/ppc: convert vspltis[bhw] to use vector operations |
Date: |
Mon, 17 Dec 2018 22:38:56 -0800 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/ppc/helper.h | 3 ---
target/ppc/int_helper.c | 15 ------------
target/ppc/translate/vmx-impl.inc.c | 36 +++++++----------------------
3 files changed, 8 insertions(+), 46 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 553ff500c8..2aa60e5d36 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -246,9 +246,6 @@ DEF_HELPER_3(vrld, void, avr, avr, avr)
DEF_HELPER_3(vsl, void, avr, avr, avr)
DEF_HELPER_3(vsr, void, avr, avr, avr)
DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32)
-DEF_HELPER_2(vspltisb, void, avr, i32)
-DEF_HELPER_2(vspltish, void, avr, i32)
-DEF_HELPER_2(vspltisw, void, avr, i32)
DEF_HELPER_3(vspltb, void, avr, avr, i32)
DEF_HELPER_3(vsplth, void, avr, avr, i32)
DEF_HELPER_3(vspltw, void, avr, avr, i32)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 4547453ef1..e44c0d90ee 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2066,21 +2066,6 @@ VNEG(vnegw, s32)
VNEG(vnegd, s64)
#undef VNEG
-#define VSPLTI(suffix, element, splat_type) \
- void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat) \
- { \
- splat_type x = (int8_t)(splat << 3) >> 3; \
- int i; \
- \
- for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
- r->element[i] = x; \
- } \
- }
-VSPLTI(b, s8, int8_t)
-VSPLTI(h, s16, int16_t)
-VSPLTI(w, s32, int32_t)
-#undef VSPLTI
-
#define VSR(suffix, element, mask) \
void helper_vsr##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
{ \
diff --git a/target/ppc/translate/vmx-impl.inc.c
b/target/ppc/translate/vmx-impl.inc.c
index e353d3f174..be638cdb1a 100644
--- a/target/ppc/translate/vmx-impl.inc.c
+++ b/target/ppc/translate/vmx-impl.inc.c
@@ -720,25 +720,21 @@ GEN_VXRFORM_DUAL(vcmpbfp, PPC_ALTIVEC, PPC_NONE, \
GEN_VXRFORM_DUAL(vcmpgtfp, PPC_ALTIVEC, PPC_NONE, \
vcmpgtud, PPC_NONE, PPC2_ALTIVEC_207)
-#define GEN_VXFORM_SIMM(name, opc2, opc3) \
+#define GEN_VXFORM_DUPI(name, tcg_op, opc2, opc3) \
static void glue(gen_, name)(DisasContext *ctx) \
{ \
- TCGv_ptr rd; \
- TCGv_i32 simm; \
+ int simm; \
if (unlikely(!ctx->altivec_enabled)) { \
gen_exception(ctx, POWERPC_EXCP_VPU); \
return; \
} \
- simm = tcg_const_i32(SIMM5(ctx->opcode)); \
- rd = gen_avr_ptr(rD(ctx->opcode)); \
- gen_helper_##name (rd, simm); \
- tcg_temp_free_i32(simm); \
- tcg_temp_free_ptr(rd); \
+ simm = SIMM5(ctx->opcode); \
+ tcg_op(avr64_offset(rD(ctx->opcode), true), 16, 16, simm); \
}
-GEN_VXFORM_SIMM(vspltisb, 6, 12);
-GEN_VXFORM_SIMM(vspltish, 6, 13);
-GEN_VXFORM_SIMM(vspltisw, 6, 14);
+GEN_VXFORM_DUPI(vspltisb, tcg_gen_gvec_dup8i, 6, 12);
+GEN_VXFORM_DUPI(vspltish, tcg_gen_gvec_dup16i, 6, 13);
+GEN_VXFORM_DUPI(vspltisw, tcg_gen_gvec_dup32i, 6, 14);
#define GEN_VXFORM_NOA(name, opc2, opc3) \
static void glue(gen_, name)(DisasContext *ctx)
\
@@ -818,22 +814,6 @@ GEN_VXFORM_NOA(vprtybw, 1, 24);
GEN_VXFORM_NOA(vprtybd, 1, 24);
GEN_VXFORM_NOA(vprtybq, 1, 24);
-#define GEN_VXFORM_SIMM(name, opc2, opc3) \
-static void glue(gen_, name)(DisasContext *ctx)
\
- { \
- TCGv_ptr rd; \
- TCGv_i32 simm; \
- if (unlikely(!ctx->altivec_enabled)) { \
- gen_exception(ctx, POWERPC_EXCP_VPU); \
- return; \
- } \
- simm = tcg_const_i32(SIMM5(ctx->opcode)); \
- rd = gen_avr_ptr(rD(ctx->opcode)); \
- gen_helper_##name (rd, simm); \
- tcg_temp_free_i32(simm); \
- tcg_temp_free_ptr(rd); \
- }
-
#define GEN_VXFORM_UIMM(name, opc2, opc3) \
static void glue(gen_, name)(DisasContext *ctx)
\
{ \
@@ -1255,7 +1235,7 @@ GEN_VXFORM_DUAL(vsldoi, PPC_ALTIVEC, PPC_NONE,
#undef GEN_VXRFORM_DUAL
#undef GEN_VXRFORM1
#undef GEN_VXRFORM
-#undef GEN_VXFORM_SIMM
+#undef GEN_VXFORM_DUPI
#undef GEN_VXFORM_NOA
#undef GEN_VXFORM_UIMM
#undef GEN_VAFORM_PAIRED
--
2.17.2
- Re: [Qemu-devel] [PATCH 14/34] target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env, (continued)
- [Qemu-devel] [PATCH 27/34] target/ppc: Use helper_mtvscr for reset and gdb, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 29/34] target/ppc: Add helper_mfvscr, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 07/34] tcg: Add opcodes for vector minmax arithmetic, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 33/34] target/ppc: convert vadd*s and vsub*s to vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 23/34] target/ppc: convert xxspltib to vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 19/34] target/ppc: convert vspltis[bhw] to use vector operations,
Richard Henderson <=
- [Qemu-devel] [PATCH 20/34] target/ppc: convert vsplt[bhw] to use vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 16/34] target/ppc: move FP and VMX registers into aligned vsr register array, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 24/34] target/ppc: convert xxspltw to vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 11/34] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access, Richard Henderson, 2018/12/18