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[Qemu-devel] [PATCH v5 17/73] arm: convert to cpu_halted
From: |
Emilio G. Cota |
Subject: |
[Qemu-devel] [PATCH v5 17/73] arm: convert to cpu_halted |
Date: |
Thu, 13 Dec 2018 00:03:57 -0500 |
Cc: Andrzej Zaborowski <address@hidden>
Cc: Peter Maydell <address@hidden>
Cc: address@hidden
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
---
hw/arm/omap1.c | 4 ++--
hw/arm/pxa2xx_gpio.c | 2 +-
hw/arm/pxa2xx_pic.c | 2 +-
target/arm/arm-powerctl.c | 4 ++--
target/arm/cpu.c | 2 +-
target/arm/op_helper.c | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index 539d29ef9c..55a7672976 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -1769,7 +1769,7 @@ static uint64_t omap_clkdsp_read(void *opaque, hwaddr
addr,
case 0x18: /* DSP_SYSST */
cpu = CPU(s->cpu);
return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |
- (cpu->halted << 6); /* Quite useless... */
+ (cpu_halted(cpu) << 6); /* Quite useless... */
}
OMAP_BAD_REG(addr);
@@ -3790,7 +3790,7 @@ void omap_mpu_wakeup(void *opaque, int irq, int req)
struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
CPUState *cpu = CPU(mpu->cpu);
- if (cpu->halted) {
+ if (cpu_halted(cpu)) {
cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB);
}
}
diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c
index e15070188e..5c3fea42e9 100644
--- a/hw/arm/pxa2xx_gpio.c
+++ b/hw/arm/pxa2xx_gpio.c
@@ -128,7 +128,7 @@ static void pxa2xx_gpio_set(void *opaque, int line, int
level)
pxa2xx_gpio_irq_update(s);
/* Wake-up GPIOs */
- if (cpu->halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
+ if (cpu_halted(cpu) && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB);
}
}
diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c
index 61275fa040..46ab4c3fc2 100644
--- a/hw/arm/pxa2xx_pic.c
+++ b/hw/arm/pxa2xx_pic.c
@@ -58,7 +58,7 @@ static void pxa2xx_pic_update(void *opaque)
PXA2xxPICState *s = (PXA2xxPICState *) opaque;
CPUState *cpu = CPU(s->cpu);
- if (cpu->halted) {
+ if (cpu_halted(cpu)) {
mask[0] = s->int_pending[0] & (s->int_enabled[0] | s->int_idle);
mask[1] = s->int_pending[1] & (s->int_enabled[1] | s->int_idle);
if (mask[0] || mask[1]) {
diff --git a/target/arm/arm-powerctl.c b/target/arm/arm-powerctl.c
index 2b856930fb..003bf6c184 100644
--- a/target/arm/arm-powerctl.c
+++ b/target/arm/arm-powerctl.c
@@ -64,7 +64,7 @@ static void arm_set_cpu_on_async_work(CPUState
*target_cpu_state,
/* Initialize the cpu we are turning on */
cpu_reset(target_cpu_state);
- target_cpu_state->halted = 0;
+ cpu_halted_set(target_cpu_state, 0);
if (info->target_aa64) {
if ((info->target_el < 3) && arm_feature(&target_cpu->env,
@@ -238,7 +238,7 @@ static void arm_set_cpu_off_async_work(CPUState
*target_cpu_state,
assert(qemu_mutex_iothread_locked());
target_cpu->power_state = PSCI_OFF;
- target_cpu_state->halted = 1;
+ cpu_halted_set(target_cpu_state, 1);
target_cpu_state->exception_index = EXCP_HLT;
}
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 60411f6bfe..8baa5bb891 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -149,7 +149,7 @@ static void arm_cpu_reset(CPUState *s)
env->vfp.xregs[ARM_VFP_MVFR2] = cpu->isar.mvfr2;
cpu->power_state = cpu->start_powered_off ? PSCI_OFF : PSCI_ON;
- s->halted = cpu->start_powered_off;
+ cpu_halted_set(s, cpu->start_powered_off);
if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index 0d6e89e474..4c8c7204d4 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -465,7 +465,7 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len)
}
cs->exception_index = EXCP_HLT;
- cs->halted = 1;
+ cpu_halted_set(cs, 1);
cpu_loop_exit(cs);
}
--
2.17.1
- [Qemu-devel] [PATCH v5 56/73] openrisc: convert to cpu_interrupt_request, (continued)
- [Qemu-devel] [PATCH v5 56/73] openrisc: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 53/73] alpha: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 60/73] cpu: convert to interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 58/73] microblaze: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 55/73] sparc: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 51/73] nios: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 69/73] cpu: rename all_cpu_threads_idle to qemu_tcg_rr_all_cpu_threads_idle, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 71/73] cpus-common: release BQL earlier in run_on_cpu, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 73/73] cputlb: queue async flush jobs without the BQL, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 17/73] arm: convert to cpu_halted,
Emilio G. Cota <=
- [Qemu-devel] [PATCH v5 57/73] unicore32: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 61/73] cpu: call .cpu_has_work with the CPU lock held, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 67/73] sparc: convert to cpu_has_work_with_iothread_lock, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 38/73] arm: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 47/73] hppa: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 62/73] cpu: introduce cpu_has_work_with_iothread_lock, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 59/73] accel/tcg: convert to cpu_interrupt_request, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 64/73] mips: convert to cpu_has_work_with_iothread_lock, Emilio G. Cota, 2018/12/13
- [Qemu-devel] [PATCH v5 25/73] s390x: convert to cpu_halted, Emilio G. Cota, 2018/12/13