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Re: [Qemu-devel] [PATCH 11/26] target/arm: Rearrange decode in disas_unc
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 11/26] target/arm: Rearrange decode in disas_uncond_b_reg |
Date: |
Tue, 11 Dec 2018 15:40:18 +0000 |
On Fri, 7 Dec 2018 at 10:36, Richard Henderson
<address@hidden> wrote:
>
> This will enable PAuth decode in a subsequent patch.
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target/arm/translate-a64.c | 34 +++++++++++++++++++++++-----------
> 1 file changed, 23 insertions(+), 11 deletions(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index c84c2dbb66..5fa2647771 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -1989,32 +1989,41 @@ static void disas_uncond_b_reg(DisasContext *s,
> uint32_t insn)
> rn = extract32(insn, 5, 5);
> op4 = extract32(insn, 0, 5);
>
> - if (op4 != 0x0 || op3 != 0x0 || op2 != 0x1f) {
> - unallocated_encoding(s);
> - return;
> + if (op2 != 0x1f) {
> + goto do_unallocated;
> }
>
> switch (opc) {
> case 0: /* BR */
> case 1: /* BLR */
> case 2: /* RET */
> - gen_a64_set_pc(s, cpu_reg(s, rn));
> + if (op3 == 0 && op4 == 0) {
> + dst = cpu_reg(s, rn);
> + } else {
> + goto do_unallocated;
> + }
> + gen_a64_set_pc(s, dst);
> /* BLR also needs to load return address */
> if (opc == 1) {
> tcg_gen_movi_i64(cpu_reg(s, 30), s->pc);
> }
> break;
> +
> case 4: /* ERET */
> if (s->current_el == 0) {
> - unallocated_encoding(s);
> - return;
> - }
> - if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> + goto do_unallocated;
> }
> dst = tcg_temp_new_i64();
> tcg_gen_ld_i64(dst, cpu_env,
> offsetof(CPUARMState, elr_el[s->current_el]));
> + if (op3 == 0 && op4 == 0) {
> + ;
> + } else {
> + goto do_unallocated;
This decode check should go before any code has been
emittede (ie before the tcg_gen_ld_i64 above it).
> + }
> + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
> + gen_io_start();
> + }
> gen_helper_exception_return(cpu_env, dst);
> tcg_temp_free_i64(dst);
> if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
> @@ -2023,14 +2032,17 @@ static void disas_uncond_b_reg(DisasContext *s,
> uint32_t insn)
> /* Must exit loop to check un-masked IRQs */
> s->base.is_jmp = DISAS_EXIT;
> return;
> +
> case 5: /* DRPS */
> - if (rn != 0x1f) {
> - unallocated_encoding(s);
> + if (op3 != 0 || op4 != 0 || rn != 0x1f) {
> + goto do_unallocated;
> } else {
> unsupported_encoding(s, insn);
> }
> return;
> +
> default:
> + do_unallocated:
> unallocated_encoding(s);
> return;
> }
thanks
-- PMM
- Re: [Qemu-devel] [PATCH 06/26] target/arm: Rearrange decode in disas_data_proc_1src, (continued)
- [Qemu-devel] [PATCH 05/26] target/arm: Decode PAuth within system hint space, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 08/26] target/arm: Decode PAuth within disas_data_proc_2src, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 07/26] target/arm: Decode PAuth within disas_data_proc_1src, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 09/26] target/arm: Move helper_exception_return to helper-a64.c, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 10/26] target/arm: Add new_pc argument to helper_exception_return, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 11/26] target/arm: Rearrange decode in disas_uncond_b_reg, Richard Henderson, 2018/12/07
- Re: [Qemu-devel] [PATCH 11/26] target/arm: Rearrange decode in disas_uncond_b_reg,
Peter Maydell <=
- [Qemu-devel] [PATCH 15/26] target/arm: Introduce arm_mmu_idx, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 13/26] target/arm: Decode Load/store register (pac), Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 12/26] target/arm: Decode PAuth within disas_uncond_b_reg, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 14/26] target/arm: Move cpu_mmu_index out of line, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 17/26] target/arm: Reuse aa64_va_parameters for setting tbflags, Richard Henderson, 2018/12/07