[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 05/26] target/arm: Decode PAuth within system hint s
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 05/26] target/arm: Decode PAuth within system hint space |
Date: |
Fri, 7 Dec 2018 04:36:10 -0600 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate-a64.c | 93 +++++++++++++++++++++++++++++++++-----
1 file changed, 81 insertions(+), 12 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 7c1cc1ce8e..0df344f9e8 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -1471,33 +1471,102 @@ static void handle_hint(DisasContext *s, uint32_t insn,
}
switch (selector) {
- case 0: /* NOP */
- return;
- case 3: /* WFI */
+ case 000: /* NOP */
+ break;
+ case 003: /* WFI */
s->base.is_jmp = DISAS_WFI;
- return;
+ break;
+ case 001: /* YIELD */
/* When running in MTTCG we don't generate jumps to the yield and
* WFE helpers as it won't affect the scheduling of other vCPUs.
* If we wanted to more completely model WFE/SEV so we don't busy
* spin unnecessarily we would need to do something more involved.
*/
- case 1: /* YIELD */
if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {
s->base.is_jmp = DISAS_YIELD;
}
- return;
- case 2: /* WFE */
+ break;
+ case 002: /* WFE */
if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {
s->base.is_jmp = DISAS_WFE;
}
- return;
- case 4: /* SEV */
- case 5: /* SEVL */
+ break;
+ case 004: /* SEV */
+ case 005: /* SEVL */
/* we treat all as NOP at least for now */
- return;
+ break;
+ case 007: /* XPACLRI */
+ if (s->pauth_active) {
+ gen_helper_xpaci(cpu_X[30], cpu_env, cpu_X[30]);
+ }
+ break;
+ case 010: /* PACIA1716 */
+ if (s->pauth_active) {
+ gen_helper_pacia(cpu_X[17], cpu_env, cpu_X[17], cpu_X[16]);
+ }
+ break;
+ case 012: /* PACIB1716 */
+ if (s->pauth_active) {
+ gen_helper_pacib(cpu_X[17], cpu_env, cpu_X[17], cpu_X[16]);
+ }
+ break;
+ case 014: /* AUTIA1716 */
+ if (s->pauth_active) {
+ gen_helper_autia(cpu_X[17], cpu_env, cpu_X[17], cpu_X[16]);
+ }
+ break;
+ case 016: /* AUTIB1716 */
+ if (s->pauth_active) {
+ gen_helper_autib(cpu_X[17], cpu_env, cpu_X[17], cpu_X[16]);
+ }
+ break;
+ case 030: /* PACIAZ */
+ if (s->pauth_active) {
+ gen_helper_pacia(cpu_X[30], cpu_env, cpu_X[30],
+ new_tmp_a64_zero(s));
+ }
+ break;
+ case 031: /* PACIASP */
+ if (s->pauth_active) {
+ gen_helper_pacia(cpu_X[30], cpu_env, cpu_X[30], cpu_X[31]);
+ }
+ break;
+ case 032: /* PACIBZ */
+ if (s->pauth_active) {
+ gen_helper_pacib(cpu_X[30], cpu_env, cpu_X[30],
+ new_tmp_a64_zero(s));
+ }
+ break;
+ case 033: /* PACIBSP */
+ if (s->pauth_active) {
+ gen_helper_pacib(cpu_X[30], cpu_env, cpu_X[30], cpu_X[31]);
+ }
+ break;
+ case 034: /* AUTIAZ */
+ if (s->pauth_active) {
+ gen_helper_autia(cpu_X[30], cpu_env, cpu_X[30],
+ new_tmp_a64_zero(s));
+ }
+ break;
+ case 035: /* AUTIASP */
+ if (s->pauth_active) {
+ gen_helper_autia(cpu_X[30], cpu_env, cpu_X[30], cpu_X[31]);
+ }
+ break;
+ case 036: /* AUTIBZ */
+ if (s->pauth_active) {
+ gen_helper_autib(cpu_X[30], cpu_env, cpu_X[30],
+ new_tmp_a64_zero(s));
+ }
+ break;
+ case 037: /* AUTIBSP */
+ if (s->pauth_active) {
+ gen_helper_autib(cpu_X[30], cpu_env, cpu_X[30], cpu_X[31]);
+ }
+ break;
default:
/* default specified as NOP equivalent */
- return;
+ break;
}
}
--
2.17.2
- [Qemu-devel] [PATCH 02/26] target/arm: Add SCTLR bits through ARMv8.5, (continued)
- [Qemu-devel] [PATCH 02/26] target/arm: Add SCTLR bits through ARMv8.5, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 03/26] target/arm: Add PAuth active bit to tbflags, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 01/26] target/arm: Add state for the ARMv8.3-PAuth extension, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 04/26] target/arm: Add PAuth helpers, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 06/26] target/arm: Rearrange decode in disas_data_proc_1src, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 05/26] target/arm: Decode PAuth within system hint space,
Richard Henderson <=
- [Qemu-devel] [PATCH 08/26] target/arm: Decode PAuth within disas_data_proc_2src, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 07/26] target/arm: Decode PAuth within disas_data_proc_1src, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 09/26] target/arm: Move helper_exception_return to helper-a64.c, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 10/26] target/arm: Add new_pc argument to helper_exception_return, Richard Henderson, 2018/12/07
- [Qemu-devel] [PATCH 11/26] target/arm: Rearrange decode in disas_uncond_b_reg, Richard Henderson, 2018/12/07