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Re: [Qemu-devel] [PATCH 16/28] target/riscv: Convert quadrant 1 of RVXC
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 16/28] target/riscv: Convert quadrant 1 of RVXC insns to decodetree |
Date: |
Fri, 19 Oct 2018 08:38:29 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 |
On 10/19/18 8:28 AM, Bastian Koppelmann wrote:
>
> On 10/13/18 8:53 PM, Richard Henderson wrote:
>> On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
>>> +static bool trans_c_addi(DisasContext *ctx, arg_c_addi *a, uint16_t insn)
>>> +{
>>> + if (a->imm == 0) {
>>> + return true;
>>> + }
>> return false, I think.
>
>
> Those are HINTS, which means the instruction in valid, but does not affect
> state, so true is correct. If I do return false, then Linux does not boot
> anymore :)
Ah, this information is not present in the main body of the text, only in table
12.5. It might be good to add comments to the code here.
Thanks.
r~