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[Qemu-devel] [PATCH 09/20] target/arm: Use gvec for NEON_3R_VADD_VSUB in
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 09/20] target/arm: Use gvec for NEON_3R_VADD_VSUB insns |
Date: |
Thu, 11 Oct 2018 13:51:55 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 29 ++++++++++-------------------
1 file changed, 10 insertions(+), 19 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4ab9f69b01..4dcd7123e9 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5949,6 +5949,16 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
break;
}
return 0;
+
+ case NEON_3R_VADD_VSUB:
+ if (u) {
+ tcg_gen_gvec_sub(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+ } else {
+ tcg_gen_gvec_add(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+ }
+ return 0;
}
if (size == 3) {
/* 64-bit element instructions. */
@@ -6006,13 +6016,6 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
cpu_V1, cpu_V0);
}
break;
- case NEON_3R_VADD_VSUB:
- if (u) {
- tcg_gen_sub_i64(CPU_V001);
- } else {
- tcg_gen_add_i64(CPU_V001);
- }
- break;
default:
abort();
}
@@ -6147,18 +6150,6 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
tmp2 = neon_load_reg(rd, pass);
gen_neon_add(size, tmp, tmp2);
break;
- case NEON_3R_VADD_VSUB:
- if (!u) { /* VADD */
- gen_neon_add(size, tmp, tmp2);
- } else { /* VSUB */
- switch (size) {
- case 0: gen_helper_neon_sub_u8(tmp, tmp, tmp2); break;
- case 1: gen_helper_neon_sub_u16(tmp, tmp, tmp2); break;
- case 2: tcg_gen_sub_i32(tmp, tmp, tmp2); break;
- default: abort();
- }
- }
- break;
case NEON_3R_VTST_VCEQ:
if (!u) { /* VTST */
switch (size) {
--
2.17.1
- [Qemu-devel] [PATCH 00/20] target/arm: Convert some neon insns to gvec, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 01/20] target/arm: Hoist address increment for vector memory ops, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 02/20] target/arm: Don't call tcg_clear_temp_count, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 09/20] target/arm: Use gvec for NEON_3R_VADD_VSUB insns,
Richard Henderson <=
- [Qemu-devel] [PATCH 17/20] target/arm: Use gvec for NEON VLD all lanes, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 11/20] target/arm: Use gvec for NEON_3R_VMUL, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 18/20] target/arm: Reorg NEON VLD/VST all elements, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 05/20] target/arm: Mark some arrays const, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 03/20] target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R, Richard Henderson, 2018/10/11