These are some patches that I have cherry picked from Michael's RISC-V
tree that are ready to be applied.
Unless anyone has any comments against these I'll send a PR later this
week.
Michael Clark (5):
RISC-V: Allow setting and clearing multiple irqs
RISC-V: Move non-ops from op_helper to cpu_helper
RISC-V: Update CSR and interrupt definitions
RISC-V: Add missing free for plic_hart_config
RISC-V: Don't add NULL bootargs to device-tree
hw/riscv/sifive_clint.c | 8 +-
hw/riscv/sifive_plic.c | 4 +-
hw/riscv/sifive_u.c | 4 +-
hw/riscv/spike.c | 6 +-
hw/riscv/virt.c | 6 +-
target/riscv/Makefile.objs | 2 +-
target/riscv/cpu.c | 6 +-
target/riscv/cpu.h | 22 +-
target/riscv/cpu_bits.h | 683 +++++++++++++-----------
target/riscv/{helper.c => cpu_helper.c} | 35 +-
target/riscv/op_helper.c | 34 +-
11 files changed, 438 insertions(+), 372 deletions(-)
rename target/riscv/{helper.c => cpu_helper.c} (95%)