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Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches |
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Date: |
Wed, 10 Oct 2018 19:10:07 +0100 |
On 10 October 2018 at 18:49, Palmer Dabbelt <address@hidden> wrote:
> we should really
> get the ball rolling on our big patch backlog.
Yes, please do. Softfreeze is not all that far away and I
would strongly prefer not to get an enormous sized pull
request at the last minute. The ideal pattern is that
code changes come in at a steady rate across the whole
of the 'open' part of the development cycle.
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v1 2/5] RISC-V: Move non-ops from op_helper to cpu_helper, (continued)
- [Qemu-devel] [PATCH v1 3/5] RISC-V: Update CSR and interrupt definitions, Alistair Francis, 2018/10/08
- [Qemu-devel] [PATCH v1 4/5] RISC-V: Add missing free for plic_hart_config, Alistair Francis, 2018/10/08
- [Qemu-devel] [PATCH v1 5/5] RISC-V: Don't add NULL bootargs to device-tree, Alistair Francis, 2018/10/08
- Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches, Palmer Dabbelt, 2018/10/10
- Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches,
Peter Maydell <=
- Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches, Michael Clark, 2018/10/11
- Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches, Peter Maydell, 2018/10/12
- Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches, Palmer Dabbelt, 2018/10/15
- Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches, Peter Maydell, 2018/10/16
- Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches, Palmer Dabbelt, 2018/10/16