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[Qemu-devel] [PATCH v9 29/84] target/mips: Add emulation of nanoMIPS ins
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v9 29/84] target/mips: Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV |
Date: |
Thu, 16 Aug 2018 16:57:22 +0200 |
From: Yongbok Kim <address@hidden>
Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
target/mips/translate.c | 33 ++++++++++++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 20f6ef5..42cd18c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -17308,8 +17308,39 @@ static int decode_nanomips_opc(CPUMIPSState *env,
DisasContext *ctx)
}
break;
case NM_MOVEP:
- break;
case NM_MOVEPREV:
+ {
+ static const int gpr2reg1[] = {4, 5, 6, 7};
+ static const int gpr2reg2[] = {5, 6, 7, 8};
+ int re;
+ int rd2 = extract32(ctx->opcode, 3, 1) << 1 |
+ extract32(ctx->opcode, 8, 1);
+ int r1 = gpr2reg1[rd2];
+ int r2 = gpr2reg2[rd2];
+ int r3 = extract32(ctx->opcode, 4, 1) << 3 |
+ extract32(ctx->opcode, 0, 3);
+ int r4 = extract32(ctx->opcode, 9, 1) << 3 |
+ extract32(ctx->opcode, 5, 3);
+ TCGv t0 = tcg_temp_new();
+ TCGv t1 = tcg_temp_new();
+ if (op == NM_MOVEP) {
+ rd = r1;
+ re = r2;
+ rs = decode_gpr_gpr4_zero(r3);
+ rt = decode_gpr_gpr4_zero(r4);
+ } else {
+ rd = decode_gpr_gpr4(r3);
+ re = decode_gpr_gpr4(r4);
+ rs = r1;
+ rt = r2;
+ }
+ gen_load_gpr(t0, rs);
+ gen_load_gpr(t1, rt);
+ tcg_gen_mov_tl(cpu_gpr[rd], t0);
+ tcg_gen_mov_tl(cpu_gpr[re], t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+ }
break;
default:
return decode_nanomips_32_48_opc(env, ctx);
--
2.7.4
- Re: [Qemu-devel] [PATCH v9 39/84] target/mips: Add emulation of nanoMIPS 32-bit branch instructions, (continued)
- [Qemu-devel] [PATCH v9 44/84] target/mips: Add emulation of DSP ASE for nanoMIPS - part 3, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 42/84] target/mips: Add emulation of DSP ASE for nanoMIPS - part 1, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 46/84] target/mips: Add emulation of DSP ASE for nanoMIPS - part 5, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 41/84] target/mips: Implement MT ASE support for nanoMIPS, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 43/84] target/mips: Add emulation of DSP ASE for nanoMIPS - part 2, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 29/84] target/mips: Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v9 60/84] mips_malta: Add setting up GT64120 BARs to the nanoMIPS bootloader, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 37/84] target/mips: Add emulation of nanoMIPS 32-bit load and store instructions, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 38/84] target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 16/84] target/mips: Add preprocessor constants for nanoMIPS, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 49/84] target/mips: Add handling of ISA mode bit for nanoMIPS, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 58/84] elf: On elf loading, treat both EM_MIPS and EM_NANOMIPS as legal for MIPS, Aleksandar Markovic, 2018/08/16
- [Qemu-devel] [PATCH v9 45/84] target/mips: Add emulation of DSP ASE for nanoMIPS - part 4, Aleksandar Markovic, 2018/08/16