Re: [Qemu-devel] [PATCH v2] nvic: Change NVIC to support ARMv6-M

[Peter Maydell]

On 20 July 2018 at 09:09, Julia Suvorova <address@hidden> wrote:
> On 19.07.2018 19:25, Peter Maydell wrote:
>>
>> On 19 July 2018 at 13:16, Julia Suvorova <address@hidden> wrote:
>>>
>>> The differences from ARMv7-M NVIC are:
>>>    * ARMv6-M only supports up to 32 external interrupts
>>>     (configurable feature already). The ICTR is reserved.
>>>    * Active Bit Register is reserved.
>>>    * ARMv6-M supports 4 priority levels against 256 in ARMv7-M.
>>>
>>> Signed-off-by: Julia Suvorova <address@hidden>
>>> ---
>>> v2:
>>>      * Added num_prio_bits field
>>>      * AIRCR.PRIGROUP is set as RAZ/WI for Baseline
>>
>>
>> Applied to target-arm.for-3.1, thanks.
>
>
> It seems like you applied the first version of this patch.
> Can you check this, please?

Oops, yes, you're right (v2 didn't get into the 'patches' db
for some reason). Now fixed.

thanks
-- PMM