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Re: [Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanup
From: |
Emilio G. Cota |
Subject: |
Re: [Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanups |
Date: |
Tue, 6 Mar 2018 18:47:42 -0500 |
User-agent: |
Mutt/1.5.24 (2015-08-30) |
On Wed, Mar 07, 2018 at 12:07:18 +1300, Michael Clark wrote:
> BTW Apologies for the duplicate emails. I'm still getting to grips with the
> git-sendemail workflow and was using a sed script to Add Cc's which munged
> the headers as it didn't take into account Subject lines flowing to two
> lines. I guess I can just include Cc: in the commit message? and
> git-format-patch will handle it for me? or I just should how to use
> git-publish...
I don't have experience with git-publish. The following two suggestions
might help though:
- Yes, add Cc's to individual patches -- those are picked up by send-email.
That also applies to the cover letter, although note that if
you use --compose then Cc's won't be picked up. Instead, just write
the cover letter into a 0000-$cover.patch (with Cc's in there)
and do not use --compose.
- Use send-email's --dry-run option to make sure everything looks good
without actually sending any emails.
> I still have to work on Igor's requested change to CPU initializer
> declarations, and i'd also like to get the patch in that fixes fmin/fmax
> test failures using the riscv-tests testsuite by implementing IEEE-754
> minimumNumber/maximumNumber. I'll try to get a patch onto the list before
> soft-freeze. I dropped the patch which was in an earlier version of our
> port patch series due to a conflict with changes in softfloat (conversion
> of minmax from a macro to a static function iirc).
Note that if you're fixing a bug (and the fmin/fmax patch qualifies),
you can definitely get it merged post-soft-freeze.
E.
- [Qemu-devel] [PATCH v1 13/22] RISC-V: Make spike and virt header guards more, (continued)
- [Qemu-devel] [PATCH v1 13/22] RISC-V: Make spike and virt header guards more, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 15/22] RISC-V: Use memory_region_is_ram in atomic pte, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title consistent, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 16/22] RISC-V: Remove EM_RISCV ELF_MACHINE indirection from, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 18/22] RISC-V: Remove braces from satp case statement with, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 17/22] RISC-V: Ingore satp writes and return 0 for reads, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 19/22] RISC-V: riscv-qemu port supports sv39 and sv48, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 20/22] RISC-V: vectored traps are optional, Michael Clark, 2018/03/06
- Re: [Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanups, Michael Clark, 2018/03/06
- Re: [Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanups,
Emilio G. Cota <=