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[Qemu-devel] [PULL 21/21] pl110: Implement vertical compare/next base in
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 21/21] pl110: Implement vertical compare/next base interrupts |
Date: |
Thu, 25 Jan 2018 13:43:29 +0000 |
From: Linus Walleij <address@hidden>
This implements rudimentary support for interrupt generation on the
PL110. I am working on a new DRI/KMS driver for Linux and since that
uses the blanking interrupt, we need something to fire here. Without
any interrupt support Linux waits for a while and then gives ugly
messages about the vblank not working in the console (it does not
hang perpetually or anything though, DRI is pretty forgiving).
I solved it for now by setting up a timer to fire at 60Hz and pull
the interrupts for "vertical compare" and "next memory base"
at this interval. This works fine and fires roughly the same number
of IRQs on QEMU as on the hardware and leaves the console clean
and nice.
People who want to create more accurate emulation can probably work
on top of this if need be. It is certainly closer to the hardware
behaviour than what we have today anyway.
Cc: Peter Maydell <address@hidden>
Signed-off-by: Linus Walleij <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
[PMM: folded long lines]
Signed-off-by: Peter Maydell <address@hidden>
---
hw/display/pl110.c | 30 +++++++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/hw/display/pl110.c b/hw/display/pl110.c
index 8c7dcc6..cf68457 100644
--- a/hw/display/pl110.c
+++ b/hw/display/pl110.c
@@ -12,6 +12,7 @@
#include "ui/console.h"
#include "framebuffer.h"
#include "ui/pixel_ops.h"
+#include "qemu/timer.h"
#include "qemu/log.h"
#define PL110_CR_EN 0x001
@@ -19,6 +20,8 @@
#define PL110_CR_BEBO 0x200
#define PL110_CR_BEPO 0x400
#define PL110_CR_PWR 0x800
+#define PL110_IE_NB 0x004
+#define PL110_IE_VC 0x008
enum pl110_bppmode
{
@@ -50,6 +53,7 @@ typedef struct PL110State {
MemoryRegion iomem;
MemoryRegionSection fbsection;
QemuConsole *con;
+ QEMUTimer *vblank_timer;
int version;
uint32_t timing[4];
@@ -320,7 +324,24 @@ static void pl110_resize(PL110State *s, int width, int
height)
/* Update interrupts. */
static void pl110_update(PL110State *s)
{
- /* TODO: Implement interrupts. */
+ /* Raise IRQ if enabled and any status bit is 1 */
+ if (s->int_status & s->int_mask) {
+ qemu_irq_raise(s->irq);
+ } else {
+ qemu_irq_lower(s->irq);
+ }
+}
+
+static void pl110_vblank_interrupt(void *opaque)
+{
+ PL110State *s = opaque;
+
+ /* Fire the vertical compare and next base IRQs and re-arm */
+ s->int_status |= (PL110_IE_NB | PL110_IE_VC);
+ timer_mod(s->vblank_timer,
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
+ NANOSECONDS_PER_SECOND / 60);
+ pl110_update(s);
}
static uint64_t pl110_read(void *opaque, hwaddr offset,
@@ -429,6 +450,11 @@ static void pl110_write(void *opaque, hwaddr offset,
s->bpp = (val >> 1) & 7;
if (pl110_enabled(s)) {
qemu_console_resize(s->con, s->cols, s->rows);
+ timer_mod(s->vblank_timer,
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
+ NANOSECONDS_PER_SECOND / 60);
+ } else {
+ timer_del(s->vblank_timer);
}
break;
case 10: /* LCDICR */
@@ -474,6 +500,8 @@ static void pl110_realize(DeviceState *dev, Error **errp)
memory_region_init_io(&s->iomem, OBJECT(s), &pl110_ops, s, "pl110",
0x1000);
sysbus_init_mmio(sbd, &s->iomem);
sysbus_init_irq(sbd, &s->irq);
+ s->vblank_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
+ pl110_vblank_interrupt, s);
qdev_init_gpio_in(dev, pl110_mux_ctrl_set, 1);
s->con = graphic_console_init(dev, 0, &pl110_gfx_ops, s);
}
--
2.7.4
- [Qemu-devel] [PULL 03/21] target/arm: Mark disas_set_insn_syndrome inline, (continued)
- [Qemu-devel] [PULL 03/21] target/arm: Mark disas_set_insn_syndrome inline, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 01/21] target/arm: Fix 32-bit address truncation, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 02/21] i.MX: Fix FEC/ENET receive funtions, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 04/21] target/arm: Use pointers in crypto helpers, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 11/21] target/arm: Move cpu_get_tb_cpu_state out of line, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 15/21] hw/intc/arm_gic: Fix C_RPR value on idle priority, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 16/21] hw/intc/arm_gic: Fix group priority computation for group 1 IRQs, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 18/21] hw/arm/virt: Check that the CPU realize method succeeded, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 05/21] target/arm: Use pointers in neon zip/uzp helpers, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 19/21] sdhci: fix a NULL pointer dereference due to uninitialized AddresSpace object, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 21/21] pl110: Implement vertical compare/next base interrupts,
Peter Maydell <=
- [Qemu-devel] [PULL 17/21] hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 14/21] hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and pending", Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 20/21] xilinx_spips: Correct usage of an uninitialized local variable, Peter Maydell, 2018/01/25
- Re: [Qemu-devel] [PULL 00/21] target-arm queue, no-reply, 2018/01/25
- Re: [Qemu-devel] [PULL 00/21] target-arm queue, Peter Maydell, 2018/01/25