[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 01/21] target/arm: Fix 32-bit address truncation
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 01/21] target/arm: Fix 32-bit address truncation |
Date: |
Thu, 25 Jan 2018 13:43:09 +0000 |
From: Ard Biesheuvel <address@hidden>
Commit ("3b39d734141a target/arm: Handle page table walk load failures
correctly") modified both versions of the page table walking code (i.e.,
arm_ldl_ptw and arm_ldq_ptw) to record the result of the translation in
a temporary 'data' variable so that it can be inspected before being
returned. However, arm_ldq_ptw() returns an uint64_t, and using a
temporary uint32_t variable truncates the upper bits, corrupting the
result. This causes problems when using more than 4 GB of memory in
a TCG guest. So use a uint64_t instead.
Signed-off-by: Ard Biesheuvel <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c83c901..bd05f8a 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8360,7 +8360,7 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr,
bool is_secure,
MemTxAttrs attrs = {};
MemTxResult result = MEMTX_OK;
AddressSpace *as;
- uint32_t data;
+ uint64_t data;
attrs.secure = is_secure;
as = arm_addressspace(cs, attrs);
--
2.7.4
- [Qemu-devel] [PULL 00/21] target-arm queue, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 09/21] vmstate: Add VMSTATE_UINT64_SUB_ARRAY, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 06/21] target/arm: Use pointers in neon tbl helper, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 07/21] target/arm: Change the type of vfp.regs, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 10/21] target/arm: Add ARM_FEATURE_SVE, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 12/21] target/arm: Hoist store to flags output in cpu_get_tb_cpu_state, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 13/21] target/arm: Simplify fp_exception_el for user-only, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 08/21] target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 03/21] target/arm: Mark disas_set_insn_syndrome inline, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 01/21] target/arm: Fix 32-bit address truncation,
Peter Maydell <=
- [Qemu-devel] [PULL 02/21] i.MX: Fix FEC/ENET receive funtions, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 04/21] target/arm: Use pointers in crypto helpers, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 11/21] target/arm: Move cpu_get_tb_cpu_state out of line, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 15/21] hw/intc/arm_gic: Fix C_RPR value on idle priority, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 16/21] hw/intc/arm_gic: Fix group priority computation for group 1 IRQs, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 18/21] hw/arm/virt: Check that the CPU realize method succeeded, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 05/21] target/arm: Use pointers in neon zip/uzp helpers, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 19/21] sdhci: fix a NULL pointer dereference due to uninitialized AddresSpace object, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 21/21] pl110: Implement vertical compare/next base interrupts, Peter Maydell, 2018/01/25
- [Qemu-devel] [PULL 17/21] hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1, Peter Maydell, 2018/01/25