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[Qemu-devel] [PATCH 08/13] target/arm: Split arm_ccnt_enabled into gener
From: |
Aaron Lindsay |
Subject: |
[Qemu-devel] [PATCH 08/13] target/arm: Split arm_ccnt_enabled into generic pmu_counter_enabled |
Date: |
Fri, 29 Sep 2017 22:08:25 -0400 |
Signed-off-by: Aaron Lindsay <address@hidden>
---
target/arm/helper.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 3932ac0..c0ef367 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -975,17 +975,22 @@ static CPAccessResult pmreg_access_ccntr(CPUARMState *env,
return pmreg_access(env, ri, isread);
}
-static inline bool arm_ccnt_enabled(CPUARMState *env)
+static inline bool pmu_counter_enabled(CPUARMState *env, uint8_t counter)
{
/* Does not check PMCCFILTR_EL0, which is handled by pmu_counter_filtered
*/
-
- if (!(env->cp15.c9_pmcr & PMCRE) || !(env->cp15.c9_pmcnten & (1 << 31))) {
+ if (!(env->cp15.c9_pmcr & PMCRE) ||
+ !(env->cp15.c9_pmcnten & (1 << counter))) {
return false;
}
return true;
}
+static inline bool arm_ccnt_enabled(CPUARMState *env)
+{
+ return pmu_counter_enabled(env, 31);
+}
+
/* Returns true if the counter corresponding to the passed-in pmevtyper or
* pmccfiltr value is filtered using the current state */
static inline bool pmu_counter_filtered(CPUARMState *env, uint64_t pmxevtyper)
--
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies,
Inc.\nQualcomm Technologies, Inc. is a member of the\nCode Aurora Forum, a
Linux Foundation Collaborative Project.
- [Qemu-devel] [PATCH v2 00/13] More fully implement ARM PMUv3, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 01/13] target/arm: A53: Initialize PMCEID[0], Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 02/13] target/arm: Check PMCNTEN for whether PMCCNTR is enabled, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 03/13] target/arm: Reorganize PMCCNTR read, write, sync, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 07/13] target/arm: Implement PMOVSSET, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 08/13] target/arm: Split arm_ccnt_enabled into generic pmu_counter_enabled,
Aaron Lindsay <=
- [Qemu-devel] [PATCH 05/13] target/arm: Allow AArch32 access for PMCCFILTR, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 04/13] target/arm: Mask PMU register writes based on PMCR_EL0.N, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 06/13] target/arm: Filter cycle counter based on PMCCFILTR_EL0, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 09/13] target/arm: Add array for supported PMU events, generate PMCEID[01], Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 12/13] target/arm: PMU: Set PMCR.N to 4, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 13/13] target/arm: Implement PMSWINC, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 11/13] target/arm: PMU: Add instruction and cycle events, Aaron Lindsay, 2017/09/29
- [Qemu-devel] [PATCH 10/13] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER, Aaron Lindsay, 2017/09/29