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[Qemu-devel] [PULL 26/31] target/arm: Move regime_is_secure() to target/
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 26/31] target/arm: Move regime_is_secure() to target/arm/internals.h |
Date: |
Thu, 7 Sep 2017 14:28:19 +0100 |
Move the regime_is_secure() utility function to internals.h;
we are going to want to call it from translate.c.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
target/arm/internals.h | 26 ++++++++++++++++++++++++++
target/arm/helper.c | 26 --------------------------
2 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 461f558..4afebd9 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -480,4 +480,30 @@ static inline void arm_call_el_change_hook(ARMCPU *cpu)
}
}
+/* Return true if this address translation regime is secure */
+static inline bool regime_is_secure(CPUARMState *env, ARMMMUIdx mmu_idx)
+{
+ switch (mmu_idx) {
+ case ARMMMUIdx_S12NSE0:
+ case ARMMMUIdx_S12NSE1:
+ case ARMMMUIdx_S1NSE0:
+ case ARMMMUIdx_S1NSE1:
+ case ARMMMUIdx_S1E2:
+ case ARMMMUIdx_S2NS:
+ case ARMMMUIdx_MPriv:
+ case ARMMMUIdx_MNegPri:
+ case ARMMMUIdx_MUser:
+ return false;
+ case ARMMMUIdx_S1E3:
+ case ARMMMUIdx_S1SE0:
+ case ARMMMUIdx_S1SE1:
+ case ARMMMUIdx_MSPriv:
+ case ARMMMUIdx_MSNegPri:
+ case ARMMMUIdx_MSUser:
+ return true;
+ default:
+ g_assert_not_reached();
+ }
+}
+
#endif
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 1c47f71..00807b4 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7055,32 +7055,6 @@ static inline uint32_t regime_el(CPUARMState *env,
ARMMMUIdx mmu_idx)
}
}
-/* Return true if this address translation regime is secure */
-static inline bool regime_is_secure(CPUARMState *env, ARMMMUIdx mmu_idx)
-{
- switch (mmu_idx) {
- case ARMMMUIdx_S12NSE0:
- case ARMMMUIdx_S12NSE1:
- case ARMMMUIdx_S1NSE0:
- case ARMMMUIdx_S1NSE1:
- case ARMMMUIdx_S1E2:
- case ARMMMUIdx_S2NS:
- case ARMMMUIdx_MPriv:
- case ARMMMUIdx_MNegPri:
- case ARMMMUIdx_MUser:
- return false;
- case ARMMMUIdx_S1E3:
- case ARMMMUIdx_S1SE0:
- case ARMMMUIdx_S1SE1:
- case ARMMMUIdx_MSPriv:
- case ARMMMUIdx_MSNegPri:
- case ARMMMUIdx_MSUser:
- return true;
- default:
- g_assert_not_reached();
- }
-}
-
/* Return the SCTLR value which controls this address translation regime */
static inline uint32_t regime_sctlr(CPUARMState *env, ARMMMUIdx mmu_idx)
{
--
2.7.4
- [Qemu-devel] [PULL 20/31] target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M, (continued)
- [Qemu-devel] [PULL 20/31] target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 17/31] nvic: Add NS alias SCS region, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 03/31] gicv3: Convert to DEFINE_PROP_LINK, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 21/31] target/arm: Make MPU_RNR register banked for v8M, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 08/31] target/arm: Implement ARMv8M's PMSAv8 registers, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 19/31] target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8M, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 06/31] xilinx_axidma: Convert to DEFINE_PROP_LINK, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 25/31] target/arm: Make CFSR register banked for v8M, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 23/31] target/arm: Make CCR register banked for v8M, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 16/31] target/arm: Make CONTROL register banked for v8M, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 26/31] target/arm: Move regime_is_secure() to target/arm/internals.h,
Peter Maydell <=
- [Qemu-devel] [PULL 24/31] target/arm: Make MMFAR banked for v8M, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 22/31] target/arm: Make MPU_CTRL register banked for v8M, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 02/31] armv7m: Convert armv7m.memory to DEFINE_PROP_LINK, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 28/31] boards.h: Define new flag ignore_memory_transaction_failures, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 29/31] hw/arm: Set ignore_memory_transaction_failures for most ARM boards, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 05/31] xilinx_axienet: Convert to DEFINE_PROP_LINK, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 31/31] target/arm: Add Jazelle feature, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 30/31] target/arm: Implement new do_transaction_failed hook, Peter Maydell, 2017/09/07
- [Qemu-devel] [PULL 27/31] target/arm: Implement BXNS, and banked stack pointers, Peter Maydell, 2017/09/07
- Re: [Qemu-devel] [PULL 00/31] target-arm queue, Peter Maydell, 2017/09/07