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[Qemu-devel] [PATCH v15 29/32] target/arm: [a64] Move page and ss checks
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v15 29/32] target/arm: [a64] Move page and ss checks to init_disas_context |
Date: |
Mon, 24 Jul 2017 13:27:25 -0700 |
Since AArch64 uses a fixed-width ISA, we can pre-compute the number of
insns remaining on the page. Also, we can check for single-step once.
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate-a64.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 9093b8ac17..b577a58e04 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11185,6 +11185,7 @@ static int
aarch64_tr_init_disas_context(DisasContextBase *dcbase,
DisasContext *dc = container_of(dcbase, DisasContext, base);
CPUARMState *env = cpu->env_ptr;
ARMCPU *arm_cpu = arm_env_get_cpu(env);
+ int bound;
dc->pc = dc->base.pc_first;
dc->condjmp = 0;
@@ -11233,8 +11234,14 @@ static int
aarch64_tr_init_disas_context(DisasContextBase *dcbase,
dc->is_ldex = false;
dc->ss_same_el = (arm_debug_target_el(env) == dc->current_el);
- dc->next_page_start =
- (dc->base.pc_first & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
+ /* Bound the number of insns to execute to those left on the page. */
+ bound = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4;
+
+ /* If architectural single step active, limit to 1. */
+ if (dc->ss_active) {
+ bound = 1;
+ }
+ max_insns = MIN(max_insns, bound);
init_tmp_a64_array(dc);
@@ -11302,12 +11309,6 @@ static void aarch64_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
disas_a64_insn(env, dc);
}
- if (dc->base.is_jmp == DISAS_NEXT) {
- if (dc->ss_active || dc->pc >= dc->next_page_start) {
- dc->base.is_jmp = DISAS_TOO_MANY;
- }
- }
-
dc->base.pc_next = dc->pc;
translator_loop_temp_check(&dc->base);
}
--
2.13.3
- [Qemu-devel] [PATCH v15 21/32] target/arm: [tcg, a64] Port to breakpoint_check, (continued)
- [Qemu-devel] [PATCH v15 21/32] target/arm: [tcg, a64] Port to breakpoint_check, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 22/32] target/arm: [tcg] Port to translate_insn, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 23/32] target/arm: [tcg, a64] Port to translate_insn, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 24/32] target/arm: [tcg] Port to tb_stop, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 25/32] target/arm: [tcg, a64] Port to tb_stop, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 27/32] target/arm: [tcg, a64] Port to disas_log, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 26/32] target/arm: [tcg] Port to disas_log, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 30/32] target/arm: Move ss check to init_disas_context, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 28/32] target/arm: [tcg] Port to generic translation framework, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 29/32] target/arm: [a64] Move page and ss checks to init_disas_context,
Richard Henderson <=
- [Qemu-devel] [PATCH v15 32/32] target/arm: Perform per-insn cross-page check only for Thumb, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 31/32] target/arm: Split out thumb_tr_translate_insn, Richard Henderson, 2017/07/24