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[Qemu-devel] [PULL 19/22] arm: stellaris: make MII accesses complete imm
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 19/22] arm: stellaris: make MII accesses complete immediately |
Date: |
Fri, 27 Jan 2017 15:32:14 +0000 |
From: Michael Davidsaver <address@hidden>
When the guest attempts to start an MII register
access via the MCTL register, clear the START bit,
so that when the guest reads it back the register
transaction will be signalled as having completed.
This avoids the guest spinning as it polls the
START bit waiting for it to clear (which it
previously never would).
The MII registers themselves still aren't implemented,
but at least we can avoid guests spending quite so much
time busy waiting.
Signed-off-by: Michael Davidsaver <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
[PMM: expand commit message]
Signed-off-by: Peter Maydell <address@hidden>
---
hw/net/stellaris_enet.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c
index 957730e..04bd10a 100644
--- a/hw/net/stellaris_enet.c
+++ b/hw/net/stellaris_enet.c
@@ -416,7 +416,10 @@ static void stellaris_enet_write(void *opaque, hwaddr
offset,
s->thr = value;
break;
case 0x20: /* MCTL */
- s->mctl = value;
+ /* TODO: MII registers aren't modelled.
+ * Clear START, indicating that the operation completes immediately.
+ */
+ s->mctl = value & ~1;
break;
case 0x24: /* MDV */
s->mdv = value;
--
2.7.4
- [Qemu-devel] [PULL 00/22] target-arm queue, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 21/22] arm_gicv3: Fix broken logic in ELRSR calculation, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 20/22] hw/char/exynos4210_uart: Drop unused local variable frame_size, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 22/22] dma: omap: check dma channel data_type, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 18/22] armv7m: R14 should reset to 0xffffffff, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 19/22] arm: stellaris: make MII accesses complete immediately,
Peter Maydell <=
- [Qemu-devel] [PULL 17/22] armv7m: FAULTMASK should be 0 on reset, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 14/22] armv7m: set CFSR.UNDEFINSTR on undefined instructions, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 13/22] armv7m: honour CCR.STACKALIGN on exception entry, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 09/22] target/arm: Drop IS_M() macro, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 16/22] armv7m: Honour CCR.USERSETMPEND, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 05/22] hw/registerfields.h: Pull FIELD etc macros out of hw/register.h, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 07/22] armv7m: Clear FAULTMASK on return from non-NMI exceptions, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 01/22] aspeed/smc: handle dummy bytes when doing fast reads in command mode, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 02/22] armv7m: MRS/MSR: handle unprivileged access, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 12/22] armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and MMFAR, Peter Maydell, 2017/01/27