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Re: [Qemu-devel] [PATCH v2 3/5] target-m68k: Inline shifts
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH v2 3/5] target-m68k: Inline shifts |
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Date: |
Mon, 28 Nov 2016 06:35:33 -0800 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 |
On 11/27/2016 09:53 AM, Laurent Vivier wrote:
>> > + TCGv t0 = tcg_temp_new();
>> > + tcg_gen_sari_i32(QREG_CC_V, reg, bits - 1);
>> > + tcg_gen_sari_i32(t0, t0, bits - count);
> t0 is used unitialized, I think we should have here:
>
> tcg_gen_sari_i32(t0, reg, bits - count - 1);
>
> moreover we must use "bits - count - 1" to use also the current most
> significant bit to compute V flag.
>
Yep.
r~
[Qemu-devel] [PATCH v2 4/5] target-m68k: Implement bitfield ops for registers, Richard Henderson, 2016/11/09
[Qemu-devel] [PATCH v2 5/5] target-m68k: Implement bitfield ops for memory, Richard Henderson, 2016/11/09