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[Qemu-devel] [PULL 33/44] target-ppc: add stxsi[bh]x instruction
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 33/44] target-ppc: add stxsi[bh]x instruction |
Date: |
Thu, 22 Sep 2016 16:37:31 +1000 |
From: Nikunj A Dadhania <address@hidden>
stxsibx - Store VSX Scalar as Integer Byte Indexed
stxsihx - Store VSX Scalar as Integer Halfword Indexed
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 2 ++
target-ppc/translate/vsx-impl.inc.c | 3 +++
target-ppc/translate/vsx-ops.inc.c | 2 ++
3 files changed, 7 insertions(+)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 0af517a..e747c1f 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2525,6 +2525,8 @@ static void glue(gen_qemu_, glue(stop,
_i64))(DisasContext *ctx, \
tcg_gen_qemu_st_i64(val, addr, ctx->mem_idx, op); \
}
+GEN_QEMU_STORE_64(st8, DEF_MEMOP(MO_UB))
+GEN_QEMU_STORE_64(st16, DEF_MEMOP(MO_UW))
GEN_QEMU_STORE_64(st32, DEF_MEMOP(MO_UL))
GEN_QEMU_STORE_64(st64, DEF_MEMOP(MO_Q))
diff --git a/target-ppc/translate/vsx-impl.inc.c
b/target-ppc/translate/vsx-impl.inc.c
index 888f2e4..eee6052 100644
--- a/target-ppc/translate/vsx-impl.inc.c
+++ b/target-ppc/translate/vsx-impl.inc.c
@@ -118,6 +118,9 @@ static void gen_##name(DisasContext *ctx)
\
}
VSX_STORE_SCALAR(stxsdx, st64_i64)
+
+VSX_STORE_SCALAR(stxsibx, st8_i64)
+VSX_STORE_SCALAR(stxsihx, st16_i64)
VSX_STORE_SCALAR(stxsiwx, st32_i64)
VSX_STORE_SCALAR(stxsspx, st32fs)
diff --git a/target-ppc/translate/vsx-ops.inc.c
b/target-ppc/translate/vsx-ops.inc.c
index 4cd742c..414b73b 100644
--- a/target-ppc/translate/vsx-ops.inc.c
+++ b/target-ppc/translate/vsx-ops.inc.c
@@ -9,6 +9,8 @@ GEN_HANDLER_E(lxvdsx, 0x1F, 0x0C, 0x0A, 0, PPC_NONE, PPC2_VSX),
GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX),
GEN_HANDLER_E(stxsdx, 0x1F, 0xC, 0x16, 0, PPC_NONE, PPC2_VSX),
+GEN_HANDLER_E(stxsibx, 0x1F, 0xD, 0x1C, 0, PPC_NONE, PPC2_ISA300),
+GEN_HANDLER_E(stxsihx, 0x1F, 0xD, 0x1D, 0, PPC_NONE, PPC2_ISA300),
GEN_HANDLER_E(stxsiwx, 0x1F, 0xC, 0x04, 0, PPC_NONE, PPC2_VSX207),
GEN_HANDLER_E(stxsspx, 0x1F, 0xC, 0x14, 0, PPC_NONE, PPC2_VSX207),
GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX),
--
2.7.4
- [Qemu-devel] [PULL 17/44] spapr_drc: convert to trace framework instead of DPRINTF, (continued)
- [Qemu-devel] [PULL 17/44] spapr_drc: convert to trace framework instead of DPRINTF, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 25/44] target-ppc: consolidate store operations, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 32/44] target-ppc: add lxsi[bw]zx instruction, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 24/44] target-ppc: convert ld[16, 32, 64]ur to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 21/44] spapr_vscsi: convert to trace framework instead of DPRINTF, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 26/44] target-ppc: convert st64 to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 43/44] linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 29/44] target-ppc: move out stqcx impementation, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 35/44] spapr: Introduce sPAPRCPUCoreClass, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 36/44] target-ppc: add TLB_NEED_LOCAL_FLUSH flag, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 33/44] target-ppc: add stxsi[bh]x instruction,
David Gibson <=
- [Qemu-devel] [PULL 42/44] ppc/kvm: Mark 64kB page size support as disabled if not available, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 41/44] ppc/xics: An ICS with offset 0 is assumed to be uninitialized, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 03/44] target-ppc: add vector insert instructions, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 38/44] target-ppc: tlbie/tlbivax should have global effect, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 23/44] target-ppc: convert ld64 to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 37/44] target-ppc: add flag in check_tlb_flush(), David Gibson, 2016/09/22
- [Qemu-devel] [PULL 40/44] ppc/xics: account correct irq status, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 44/44] monitor: fix crash for platforms without a CPU 0, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 30/44] target-ppc: consolidate store conditional, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 34/44] target-ppc: implement darn instruction, David Gibson, 2016/09/22