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[Qemu-devel] [PULL 41/44] ppc/xics: An ICS with offset 0 is assumed to b
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 41/44] ppc/xics: An ICS with offset 0 is assumed to be uninitialized |
Date: |
Thu, 22 Sep 2016 16:37:39 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
This will make life easier for dealing with dynamically configured
ICSes such as PHB3
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
include/hw/ppc/xics.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 2db9f93..5aac67a 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -149,7 +149,7 @@ struct ICSState {
static inline bool ics_valid_irq(ICSState *ics, uint32_t nr)
{
- return (nr >= ics->offset)
+ return (ics->offset != 0) && (nr >= ics->offset)
&& (nr < (ics->offset + ics->nr_irqs));
}
--
2.7.4
- [Qemu-devel] [PULL 32/44] target-ppc: add lxsi[bw]zx instruction, (continued)
- [Qemu-devel] [PULL 32/44] target-ppc: add lxsi[bw]zx instruction, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 24/44] target-ppc: convert ld[16, 32, 64]ur to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 21/44] spapr_vscsi: convert to trace framework instead of DPRINTF, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 26/44] target-ppc: convert st64 to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 43/44] linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 29/44] target-ppc: move out stqcx impementation, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 35/44] spapr: Introduce sPAPRCPUCoreClass, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 36/44] target-ppc: add TLB_NEED_LOCAL_FLUSH flag, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 33/44] target-ppc: add stxsi[bh]x instruction, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 42/44] ppc/kvm: Mark 64kB page size support as disabled if not available, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 41/44] ppc/xics: An ICS with offset 0 is assumed to be uninitialized,
David Gibson <=
- [Qemu-devel] [PULL 03/44] target-ppc: add vector insert instructions, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 38/44] target-ppc: tlbie/tlbivax should have global effect, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 23/44] target-ppc: convert ld64 to use new macro, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 37/44] target-ppc: add flag in check_tlb_flush(), David Gibson, 2016/09/22
- [Qemu-devel] [PULL 40/44] ppc/xics: account correct irq status, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 44/44] monitor: fix crash for platforms without a CPU 0, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 30/44] target-ppc: consolidate store conditional, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 34/44] target-ppc: implement darn instruction, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 28/44] target-ppc: consolidate load with reservation, David Gibson, 2016/09/22
- [Qemu-devel] [PULL 05/44] target-ppc: add vector count trailing zeros instructions, David Gibson, 2016/09/22