Re: [Qemu-devel] [PATCH 05/11] target-arm: Use correct mmu_idx for unprivileged loads and stores

[Greg Bellows]

On Mon, Jan 26, 2015 at 8:56 AM, Peter Maydell <address@hidden> wrote:

On 26 January 2015 at 14:40, Greg Bellows <address@hidden> wrote:
> On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell <address@hidden>
> wrote:
>>
>> The MMU index to use for unprivileged loads and stores is more
>> complicated than we currently implement:
>>  * for A64, it should be "if at EL1, access as if EL0; otherwise
>>    access at current EL"
>>  * for A32/T32, it should be "if EL2, UNPREDICTABLE; otherwise
>>    access as if at EL0".
>>
>
> The wording between the specs appears to be almost identical, curious why
> the handling is different?

Because that's what the ARM ARM specifies. Compare C3.2.5 (A64 LDT &c)
with F7.1.95 (A32/T32 LDRT).

​​

​I had been comparing the wording of ARMv8 - F1.6.3 and ​ARMv7 - A4.6.3. 

After comparing the LDRT instructions between A64 (C6.6.97) and A32 (F7.1.95), I am still missing the distinction that warrants the following different behavior:

- EL2 is unpredictable in both A64 and A32, but in one case we treat it as such and the other we demote it to NS/EL0 to allow it.

- EL3 is demoted to S/EL0 in one case but remains EL3 in the other.

 

-- PMM