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[Qemu-devel] [PATCH v3 3/4] serial: update LSR on enabling/disabling FIF
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH v3 3/4] serial: update LSR on enabling/disabling FIFOs |
Date: |
Fri, 12 Dec 2014 13:44:02 +0100 |
When the transmit FIFO is emptied or enabled, the transmitter
hold register is empty. When it is disabled, it is also emptied and
in addition the previous contents of the transmitter hold register
are discarded. In either case, the THRE bit in LSR must be set and
THRI raised.
When the receive FIFO is emptied or enabled, the data ready and break
bits must be cleared in LSR. Likewise when the receive FIFO is disabled.
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/char/serial.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/char/serial.c b/hw/char/serial.c
index 4bce268..0a6747c 100644
--- a/hw/char/serial.c
+++ b/hw/char/serial.c
@@ -377,12 +377,15 @@ static void serial_ioport_write(void *opaque, hwaddr
addr, uint64_t val,
/* FIFO clear */
if (val & UART_FCR_RFR) {
+ s->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
timer_del(s->fifo_timeout_timer);
s->timeout_ipending = 0;
fifo8_reset(&s->recv_fifo);
}
if (val & UART_FCR_XFR) {
+ s->lsr |= UART_LSR_THRE;
+ s->thr_ipending = 1;
fifo8_reset(&s->xmit_fifo);
}
--
1.8.3.1
- [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, (continued)
- [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/12
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Dr. David Alan Gilbert, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Dr. David Alan Gilbert, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Dr. David Alan Gilbert, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
[Qemu-devel] [PATCH v3 4/4] serial: only resample THR interrupt on rising edge of IER.THRI, Paolo Bonzini, 2014/12/12
[Qemu-devel] [PATCH v3 3/4] serial: update LSR on enabling/disabling FIFOs,
Paolo Bonzini <=
[Qemu-devel] [PATCH v3 2/4] serial: clean up THRE/TEMT handling, Paolo Bonzini, 2014/12/12