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Re: [Qemu-devel] [PATCH] target-i386: add Intel AVX-512 support
From: |
Paolo Bonzini |
Subject: |
Re: [Qemu-devel] [PATCH] target-i386: add Intel AVX-512 support |
Date: |
Mon, 27 Oct 2014 16:53:01 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 |
On 10/27/2014 04:48 PM, Eduardo Habkost wrote:
> On Fri, Oct 24, 2014 at 07:55:10AM +0200, Paolo Bonzini wrote:
> [...]
>> I think we can keep the macros. The actual cleanup would be to have a
>> single member for the 32 512-bit ZMM registers, instead of splitting
>> xmm/ymmh/zmmh/zmm_hi16. This will get rid of the YMM_* and ZMM_*
>> registers. However, we could not use simple memcpy()s to marshal in and
>> out of the XSAVE data. We can do it in 2.2.
>
> Now, about the actual 2.3 plans: I believe the xmm/ymmh/zmmh/zmm_hi16
> separation actually makes the code simpler, because the only code
> touching those registers inside QEMU is xsave/vmstate state
> loading/saving, where the bits of the ZMM registers are split into
> different sections/fields exactly in the same way.
>
> We can still eliminate the YMM_* and ZMM_* macros while keeping
> xmm/ymmh/zmmh/zmm_hi16 as separate fields, and having a single zmm_regs
> member would just add unnecessary complexity to the
> XSAVE<->CPUX86State<->VMState translation code.
>
> (But if one day TCG starts implementing AVX or AVX512, then it may be
> worthwhile to move the ZMM registers into a single field.)
Yes, exactly---or even sooner, if we start dumping the 256 or 512 byte
registers. I think the current separation of xmm/ymmh/zmmh/zmm_hi16 is
a KVM-ism.
Let's see what the patches look like, once they are ready.
Paolo
Re: [Qemu-devel] [PATCH] target-i386: add Intel AVX-512 support, Eduardo Habkost, 2014/10/24