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Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() functi
From: |
Sergey Fedorov |
Subject: |
Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function |
Date: |
Wed, 14 May 2014 09:53:12 +0400 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 13.05.2014 20:15, Fabian Aggeler wrote:
> arm_is_secure() function allows to determine CPU security state
> if the CPU implements Security Extensions.
>
> Signed-off-by: Sergey Fedorov <address@hidden>
> Signed-off-by: Fabian Aggeler <address@hidden>
> ---
> target-arm/cpu.h | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index a56d3d6..6ea0432 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -640,6 +640,21 @@ static inline int arm_feature(CPUARMState *env, int
> feature)
> return (env->features & (1ULL << feature)) != 0;
> }
>
> +/* Return true if the processor is in secure state */
> +static inline bool arm_is_secure(CPUARMState *env)
> +{
> +#if !defined(CONFIG_USER_ONLY)
> + if (arm_feature(env, ARM_FEATURE_SECURITY_EXTENSIONS)) {
I think feature test can be safely avoided here. Without this feature
that should be no way to switch to monitor mode and to access SCR register.
> + return ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) ||
> + !(env->cp15.c1_scr & 1);
> + } else {
> + return false;
> + }
> +#else
> + return false;
That is a good question how to treat user emulation: secure or
non-secure. Perhaps assuming user emulation in secure state may simplify
code in the following patches.
> +#endif
> +}
> +
> /* Return true if the specified exception level is running in AArch64 state.
> */
> static inline bool arm_el_is_aa64(CPUARMState *env, int el)
> {
Thanks,
Sergey.
- [Qemu-devel] [PATCH v2 21/23] target-arm: implement SMC instruction, (continued)
- [Qemu-devel] [PATCH v2 21/23] target-arm: implement SMC instruction, Fabian Aggeler, 2014/05/13
- [Qemu-devel] [PATCH v2 15/23] target-arm: Restrict EL3 to Aarch32 state, Fabian Aggeler, 2014/05/13
- [Qemu-devel] [PATCH v2 23/23] target-arm: Respect SCR.FW, SCR.AW and SCTLR.NMFI, Fabian Aggeler, 2014/05/13
- [Qemu-devel] [PATCH v2 16/23] target-arm: Use arm_current_sctlr to access SCTLR, Fabian Aggeler, 2014/05/13
- [Qemu-devel] [PATCH v2 19/23] target-arm: maintain common bits of banked CP registers, Fabian Aggeler, 2014/05/13
- [Qemu-devel] [PATCH v2 18/23] target-arm: Convert banked coprocessor registers, Fabian Aggeler, 2014/05/13
- [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function, Fabian Aggeler, 2014/05/13
- Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function,
Sergey Fedorov <=
- Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function, Greg Bellows, 2014/05/14
- Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function, Fedorov Sergey, 2014/05/14
- Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function, Greg Bellows, 2014/05/14
- Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function, Peter Maydell, 2014/05/14
- Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function, Greg Bellows, 2014/05/14
- Re: [Qemu-devel] [PATCH v2 06/23] target-arm: add arm_is_secure() function, Aggeler Fabian, 2014/05/15
[Qemu-devel] [PATCH v2 17/23] target-arm: Use raw_write/raw_read whenever possible, Fabian Aggeler, 2014/05/13
Re: [Qemu-devel] [PATCH v2 00/23] target-arm: add Security Extensions for CPUs, Sergey Fedorov, 2014/05/15