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[Qemu-devel] [PATCH 06/40] target-alpha: Convert opcode 0x12 to source/s
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 06/40] target-alpha: Convert opcode 0x12 to source/sink |
Date: |
Thu, 17 Apr 2014 12:32:41 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-alpha/translate.c | 63 +++++++++++++++++++++---------------------------
1 file changed, 27 insertions(+), 36 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index b378e90..4299104 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2203,7 +2203,10 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
goto invalid_opc;
}
break;
+
case 0x12:
+ vc = dest_gpr(ctx, rc);
+ va = load_gpr(ctx, ra);
switch (fn7) {
case 0x02:
/* MSKBL */
@@ -2255,18 +2258,14 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
break;
case 0x34:
/* SRL */
- if (likely(rc != 31)) {
- if (ra != 31) {
- if (islit) {
- tcg_gen_shri_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f);
- } else {
- TCGv shift = tcg_temp_new();
- tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f);
- tcg_gen_shr_i64(cpu_ir[rc], cpu_ir[ra], shift);
- tcg_temp_free(shift);
- }
- } else
- tcg_gen_movi_i64(cpu_ir[rc], 0);
+ if (islit) {
+ tcg_gen_shri_i64(vc, va, lit & 0x3f);
+ } else {
+ tmp = tcg_temp_new();
+ vb = load_gpr(ctx, rb);
+ tcg_gen_andi_i64(tmp, vb, 0x3f);
+ tcg_gen_shr_i64(vc, va, tmp);
+ tcg_temp_free(tmp);
}
break;
case 0x36:
@@ -2275,18 +2274,14 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
break;
case 0x39:
/* SLL */
- if (likely(rc != 31)) {
- if (ra != 31) {
- if (islit) {
- tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f);
- } else {
- TCGv shift = tcg_temp_new();
- tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f);
- tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], shift);
- tcg_temp_free(shift);
- }
- } else
- tcg_gen_movi_i64(cpu_ir[rc], 0);
+ if (islit) {
+ tcg_gen_shli_i64(vc, va, lit & 0x3f);
+ } else {
+ tmp = tcg_temp_new();
+ vb = load_gpr(ctx, rb);
+ tcg_gen_andi_i64(tmp, vb, 0x3f);
+ tcg_gen_shl_i64(vc, va, tmp);
+ tcg_temp_free(tmp);
}
break;
case 0x3B:
@@ -2295,18 +2290,14 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
break;
case 0x3C:
/* SRA */
- if (likely(rc != 31)) {
- if (ra != 31) {
- if (islit) {
- tcg_gen_sari_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f);
- } else {
- TCGv shift = tcg_temp_new();
- tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f);
- tcg_gen_sar_i64(cpu_ir[rc], cpu_ir[ra], shift);
- tcg_temp_free(shift);
- }
- } else
- tcg_gen_movi_i64(cpu_ir[rc], 0);
+ if (islit) {
+ tcg_gen_sari_i64(vc, va, lit & 0x3f);
+ } else {
+ tmp = tcg_temp_new();
+ vb = load_gpr(ctx, rb);
+ tcg_gen_andi_i64(tmp, vb, 0x3f);
+ tcg_gen_sar_i64(vc, va, tmp);
+ tcg_temp_free(tmp);
}
break;
case 0x52:
--
1.9.0
- [Qemu-devel] [PATCH 00/40] target-alpha queue, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 03/40] target-alpha: Introduce REQUIRE_REG_31, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 05/40] target-alpha: Convert opcode 0x11 to source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 04/40] target-alpha: Introduce functions for source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 06/40] target-alpha: Convert opcode 0x12 to source/sink,
Richard Henderson <=
- [Qemu-devel] [PATCH 02/40] target-alpha: Introduce REQUIRE_TB_FLAG, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 07/40] target-alpha: Convert opcode 0x13 to source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 09/40] target-alpha: Convert opcode 0x17 to source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 08/40] target-alpha: Convert opcode 0x14 to source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 01/40] target-alpha: fix the braces, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 11/40] target-alpha: Convert opcode 0x1A to source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 13/40] target-alpha: Convert opcode 0x1C to source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 10/40] target-alpha: Convert opcode 0x18 to source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 14/40] target-alpha: Convert opcode 0x1E to source/sink, Richard Henderson, 2014/04/17
- [Qemu-devel] [PATCH 12/40] target-alpha: Convert opcode 0x1B to source/sink, Richard Henderson, 2014/04/17