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[Qemu-devel] [PULL v2 34/35] q35: document gigabyte_align
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL v2 34/35] q35: document gigabyte_align |
Date: |
Sun, 26 Jan 2014 18:07:09 +0200 |
Document the logic behind the below/above 4G split.
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/i386/pc_q35.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 7104645..a7f6260 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -51,6 +51,10 @@
static bool has_pci_info;
static bool has_acpi_build = true;
static bool smbios_type1_defaults = true;
+/* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
+ * host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
+ * pages in the host.
+ */
static bool gigabyte_align = true;
/* PC hardware initialisation */
@@ -93,6 +97,15 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
kvmclock_create();
+ /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
+ * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
+ * also known as MMCFG).
+ * If it doesn't, we need to split it in chunks below and above 4G.
+ * In any case, try to make sure that guest addresses aligned at
+ * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
+ * For old machine types, use whatever split we used historically to avoid
+ * breaking migration.
+ */
if (args->ram_size >= 0xb0000000) {
ram_addr_t lowmem = gigabyte_align ? 0x80000000 : 0xb0000000;
above_4g_mem_size = args->ram_size - lowmem;
--
MST
- [Qemu-devel] [PULL v2 24/35] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources, (continued)
- [Qemu-devel] [PULL v2 24/35] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 25/35] pc: Q35 DSDT: exclude CPU hotplug IO range from PCI bus resources, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 26/35] pc: ACPI: expose PRST IO range via _CRS, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 27/35] pc: ACPI: unify source of CPU hotplug IO base/len, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 28/35] pc: ACPI: update acpi-dsdt.hex.generated q35-acpi-dsdt.hex.generated, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 29/35] acpi-test: update expected AML since recent changes, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 30/35] hw/pci: fix error flow in pci multifunction init, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 31/35] pc: Save size of RAM below 4GB, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 32/35] acpi: Fix PCI hole handling on build_srat(), Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 33/35] q35: gigabyte alignment for ram, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 34/35] q35: document gigabyte_align,
Michael S. Tsirkin <=
- [Qemu-devel] [PULL v2 35/35] MAINTAINERS: add self as virtio co-maintainer, Michael S. Tsirkin, 2014/01/26
- Re: [Qemu-devel] [PULL v2 00/35] acpi, pci, pc, virtio fixes and enhancements, Michael S. Tsirkin, 2014/01/28
- Re: [Qemu-devel] [PULL v2 00/35] acpi, pci, pc, virtio fixes and enhancements, Peter Maydell, 2014/01/29
- Re: [Qemu-devel] [PULL v2 00/35] acpi, pci, pc, virtio fixes and enhancements, Peter Maydell, 2014/01/31