Re: [Qemu-devel] [RFC PATCH 17/21] target-arm: use c13_context field for CONTEXTIDR

[Peter Crosthwaite]

On Tue, Dec 3, 2013 at 6:48 PM, Sergey Fedorov <address@hidden> wrote:
> Use c13_context field instead of c13_fcse for CONTEXTIDR register
> definition.

This a standalone (I.E. not TZ related) bug?

Regards,
peter

>
> Signed-off-by: Sergey Fedorov <address@hidden>
> ---
>  target-arm/helper.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 9442e08..e1e9762 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -359,7 +359,7 @@ static const ARMCPRegInfo cp_reginfo[] = {
>        .resetvalue = 0, .writefn = fcse_write, .raw_writefn = raw_write, },
>      { .name = "CONTEXTIDR", .cp = 15, .crn = 13, .crm = 0, .opc1 = 0, .opc2 
> = 1,
>        .access = PL1_RW, .type = ARM_CP_BANKED,
> -      .fieldoffset = offsetof(CPUARMState, cp15.c13_fcse),
> +      .fieldoffset = offsetof(CPUARMState, cp15.c13_context),
>        .resetvalue = 0, .writefn = contextidr_write, .raw_writefn = 
> raw_write, },
>      /* ??? This covers not just the impdef TLB lockdown registers but also
>       * some v7VMSA registers relating to TEX remap, so it is overly broad.
> --
> 1.7.9.5
>
>