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[Qemu-devel] [PULL 15/62] arm/xilinx_zynq: Implement CBAR initialisation
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 15/62] arm/xilinx_zynq: Implement CBAR initialisation |
Date: |
Tue, 17 Dec 2013 20:28:33 +0000 |
From: Peter Crosthwaite <address@hidden>
Fix the CBAR initialisation by using the newly defined static property.
Zynq will now correctly init the CBAR to the SCU base address.
Needed to boot Linux on the xilinx_zynq machine model.
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/xilinx_zynq.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 1c954a3..17251c7 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -36,6 +36,8 @@
#define IRQ_OFFSET 32 /* pic interrupts start from index 32 */
+#define MPCORE_PERIPHBASE 0xF8F00000
+
static const int dma_irqs[8] = {
46, 47, 48, 49, 72, 73, 74, 75
};
@@ -122,6 +124,11 @@ static void zynq_init(QEMUMachineInitArgs *args)
cpu = ARM_CPU(object_new(object_class_get_name(cpu_oc)));
+ object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar",
&err);
+ if (err) {
+ error_report("%s", error_get_pretty(err));
+ exit(1);
+ }
object_property_set_bool(OBJECT(cpu), true, "realized", &err);
if (err) {
error_report("%s", error_get_pretty(err));
@@ -160,7 +167,7 @@ static void zynq_init(QEMUMachineInitArgs *args)
qdev_prop_set_uint32(dev, "num-cpu", 1);
qdev_init_nofail(dev);
busdev = SYS_BUS_DEVICE(dev);
- sysbus_mmio_map(busdev, 0, 0xF8F00000);
+ sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE);
sysbus_connect_irq(busdev, 0,
qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ));
--
1.8.5
- [Qemu-devel] [PULL 35/62] target-arm: A64: add support for conditional branches, (continued)
- [Qemu-devel] [PULL 35/62] target-arm: A64: add support for conditional branches, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 16/62] arm/highbank.c: Fix MPCore periphbase name, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 32/62] target-arm: A64: expand decoding skeleton for system instructions, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 28/62] target-arm: A64: provide functions for accessing FPCR and FPSR, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 25/62] default-configs: Add config for aarch64-softmmu, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 27/62] target-arm: A64: add set_pc cpu method, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 33/62] target-arm: A64: add support for B and BL insns, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 31/62] target-arm: A64: provide skeleton for a64 insn decoding, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 30/62] target-arm: A64: add stubs for a64 specific helpers, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 29/62] target-arm: Support fp registers in gdb stub, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 15/62] arm/xilinx_zynq: Implement CBAR initialisation,
Peter Maydell <=
- [Qemu-devel] [PULL 61/62] hw/arm: add cubieboard support, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 36/62] target-arm: A64: add support for 'test and branch' imm, Peter Maydell, 2013/12/17
- Re: [Qemu-devel] [PULL 00/62] target-arm queue, Anthony Liguori, 2013/12/19