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[Qemu-devel] [PULL 05/62] Set proper device-width for vexpress flash
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 05/62] Set proper device-width for vexpress flash |
Date: |
Tue, 17 Dec 2013 20:28:23 +0000 |
From: Roy Franz <address@hidden>
Create vexpress specific pflash registration
function which properly configures the device-width
of 16 bits (2 bytes) for the NOR flash on the
vexpress platform. This change is required for
buffered flash writes to work properly.
Signed-off-by: Roy Franz <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/vexpress.c | 44 ++++++++++++++++++++++++++++++++++----------
1 file changed, 34 insertions(+), 10 deletions(-)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index f48de00..939b468 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -480,6 +480,36 @@ static void vexpress_modify_dtb(const struct arm_boot_info
*info, void *fdt)
}
}
+
+/* Open code a private version of pflash registration since we
+ * need to set non-default device width for VExpress platform.
+ */
+static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
+ DriveInfo *di)
+{
+ DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
+
+ if (di && qdev_prop_set_drive(dev, "drive", di->bdrv)) {
+ abort();
+ }
+
+ qdev_prop_set_uint32(dev, "num-blocks",
+ VEXPRESS_FLASH_SIZE / VEXPRESS_FLASH_SECT_SIZE);
+ qdev_prop_set_uint64(dev, "sector-length", VEXPRESS_FLASH_SECT_SIZE);
+ qdev_prop_set_uint8(dev, "width", 4);
+ qdev_prop_set_uint8(dev, "device-width", 2);
+ qdev_prop_set_uint8(dev, "big-endian", 0);
+ qdev_prop_set_uint16(dev, "id0", 0x00);
+ qdev_prop_set_uint16(dev, "id1", 0x89);
+ qdev_prop_set_uint16(dev, "id2", 0x00);
+ qdev_prop_set_uint16(dev, "id3", 0x18);
+ qdev_prop_set_string(dev, "name", name);
+ qdev_init_nofail(dev);
+
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
+}
+
static void vexpress_common_init(VEDBoardInfo *daughterboard,
QEMUMachineInitArgs *args)
{
@@ -561,11 +591,8 @@ static void vexpress_common_init(VEDBoardInfo
*daughterboard,
sysbus_create_simple("pl111", map[VE_CLCD], pic[14]);
dinfo = drive_get_next(IF_PFLASH);
- pflash0 = pflash_cfi01_register(map[VE_NORFLASH0], NULL, "vexpress.flash0",
- VEXPRESS_FLASH_SIZE, dinfo ? dinfo->bdrv : NULL,
- VEXPRESS_FLASH_SECT_SIZE,
- VEXPRESS_FLASH_SIZE / VEXPRESS_FLASH_SECT_SIZE, 4,
- 0x00, 0x89, 0x00, 0x18, 0);
+ pflash0 = ve_pflash_cfi01_register(map[VE_NORFLASH0], "vexpress.flash0",
+ dinfo);
if (!pflash0) {
fprintf(stderr, "vexpress: error registering flash 0.\n");
exit(1);
@@ -580,11 +607,8 @@ static void vexpress_common_init(VEDBoardInfo
*daughterboard,
}
dinfo = drive_get_next(IF_PFLASH);
- if (!pflash_cfi01_register(map[VE_NORFLASH1], NULL, "vexpress.flash1",
- VEXPRESS_FLASH_SIZE, dinfo ? dinfo->bdrv : NULL,
- VEXPRESS_FLASH_SECT_SIZE,
- VEXPRESS_FLASH_SIZE / VEXPRESS_FLASH_SECT_SIZE, 4,
- 0x00, 0x89, 0x00, 0x18, 0)) {
+ if (!ve_pflash_cfi01_register(map[VE_NORFLASH1], "vexpress.flash1",
+ dinfo)) {
fprintf(stderr, "vexpress: error registering flash 1.\n");
exit(1);
}
--
1.8.5
- [Qemu-devel] [PULL 02/62] rename pflash_t member width to bank_width, (continued)
- [Qemu-devel] [PULL 02/62] rename pflash_t member width to bank_width, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 24/62] hw/arm/boot: Add boot support for AArch64 processor, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 13/62] arm/highbank: Fix CBAR initialisation, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 03/62] Add device-width property to pflash_cfi01, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 23/62] hw/arm/boot: Allow easier swapping in of different loader code, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 21/62] target-arm: Add minimal KVM AArch64 support, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 07/62] Fix CFI query responses for NOR flash, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 14/62] arm/xilinx_zynq: Use object_new() rather than cpu_arm_init(), Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 04/62] return status for each NOR flash device, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 12/62] arm/highbank: Use object_new() rather than cpu_arm_init(), Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 05/62] Set proper device-width for vexpress flash,
Peter Maydell <=
- [Qemu-devel] [PULL 60/62] hw/arm: add allwinner a10 SoC support, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 18/62] ARM: arm_cpu_reset: make it possible to use high vectors for reset_exc, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 11/62] target-arm/cpu: Convert reset CBAR to a property, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 20/62] target-arm: Clean up handling of AArch64 PSTATE, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 17/62] ARM: cpu: add "reset_hivecs" property, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 09/62] target-arm/helper.c: Allow cp15.c15 dummy override, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 06/62] Add max device width parameter for NOR devices, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 01/62] target-arm: add support for v8 AES instructions, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 19/62] target-arm/kvm: Split 32 bit only code into its own file, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 57/62] vmstate: Add support for an array of ptimer_state *, Peter Maydell, 2013/12/17