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[Qemu-devel] [PULL 11/37] target-arm: Allow secondary KVM CPUs to be boo
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 11/37] target-arm: Allow secondary KVM CPUs to be booted via PSCI |
Date: |
Tue, 10 Dec 2013 14:43:07 +0000 |
New ARM boards are generally expected to boot their secondary CPUs
via the PSCI interface, rather than ad-hoc "loop around in holding
pen code" as hw/arm/boot.c implements. In particular this is
necessary for mach-virt kernels. For KVM we achieve this by creating
the VCPUs with a feature flag marking them as starting in PSCI
powered-down state; the guest kernel will then make a PSCI call
(implemented in the host kernel) to start the secondaries at
an address of its choosing once it has got the primary CPU up.
Implement this setting of the feature flag, controlled by a
qdev property for ARMCPU, which board code can set if it is a
PSCI system.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Christoffer Dall <address@hidden>
Message-id: address@hidden
---
target-arm/cpu-qom.h | 3 +++
target-arm/cpu.c | 7 +++++++
target-arm/kvm.c | 3 +++
3 files changed, 13 insertions(+)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index cbb9eec..8bd3e36 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -94,6 +94,9 @@ typedef struct ARMCPU {
/* 'compatible' string for this CPU for Linux device trees */
const char *dtb_compatible;
+ /* Should CPU start in PSCI powered-off state? */
+ bool start_powered_off;
+
/* The instance init functions for implementation-specific subclasses
* set these fields to specify the implementation-dependent values of
* various constant registers and reset values of non-constant
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 4c8d9c7..0325815 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -20,6 +20,7 @@
#include "cpu.h"
#include "qemu-common.h"
+#include "hw/qdev-properties.h"
#if !defined(CONFIG_USER_ONLY)
#include "hw/loader.h"
#endif
@@ -944,6 +945,11 @@ static const ARMCPUInfo arm_cpus[] = {
#endif
};
+static Property arm_cpu_properties[] = {
+ DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false),
+ DEFINE_PROP_END_OF_LIST()
+};
+
static void arm_cpu_class_init(ObjectClass *oc, void *data)
{
ARMCPUClass *acc = ARM_CPU_CLASS(oc);
@@ -952,6 +958,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
acc->parent_realize = dc->realize;
dc->realize = arm_cpu_realizefn;
+ dc->props = arm_cpu_properties;
acc->parent_reset = cc->reset;
cc->reset = arm_cpu_reset;
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index 3098456..80c58c5 100644
--- a/target-arm/kvm.c
+++ b/target-arm/kvm.c
@@ -79,6 +79,9 @@ int kvm_arch_init_vcpu(CPUState *cs)
init.target = KVM_ARM_TARGET_CORTEX_A15;
memset(init.features, 0, sizeof(init.features));
+ if (cpu->start_powered_off) {
+ init.features[0] = 1 << KVM_ARM_VCPU_POWER_OFF;
+ }
ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
if (ret) {
return ret;
--
1.8.5
- [Qemu-devel] [PULL 34/37] target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions., (continued)
- [Qemu-devel] [PULL 34/37] target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 32/37] softfloat: Remove unused argument from MINMAX macro., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 31/37] target-arm: Implement ARMv8 VSEL instruction., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 24/37] net/cadence_gem: Add missing VMSTATE_END_OF_LIST, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 10/37] target-arm: Add ARMCPU field for Linux device-tree 'compatible' string, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 28/37] net/cadence_gem: Improve can_receive debug printfery, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 29/37] net/cadence_gem: Don't rx packets when no rx buffer available, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 26/37] net/cadence_gem: Fix small packet FCS stripping, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 09/37] target-arm: Provide PSCI constants to generic QEMU code, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 27/37] net/cadence_gem: Fix register w1c logic, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 11/37] target-arm: Allow secondary KVM CPUs to be booted via PSCI,
Peter Maydell <=
- [Qemu-devel] [PULL 03/37] cpu/a9mpcore: reorder operations/declarations, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 22/37] net/cadence_gem: Implement SAR match bit in rx desc, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 35/37] target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM instructions., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 25/37] net/cadence_gem: Fix rx multi-fragment packets, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 19/37] net/cadence_gem: simplify rx buf descriptor walking, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 15/37] hw/arm/virt: Support -cpu host, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 06/37] target-arm: Provide mechanism for getting KVM constants even if not CONFIG_KVM, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 12/37] hw/arm: Add 'virt' platform, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 30/37] target-arm: Move call to disas_vfp_insn out of disas_coproc_insn., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 07/37] device_tree.c: Terminate the empty reservemap in create_device_tree(), Peter Maydell, 2013/12/10