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Re: [Qemu-devel] [PATCH RFC v2 2/2] hw/pci: handle unassigned pci addres

From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH RFC v2 2/2] hw/pci: handle unassigned pci addresses
Date: Sun, 15 Sep 2013 15:08:38 +0100

On 15 September 2013 15:08, Michael S. Tsirkin <address@hidden> wrote:
> On Sun, Sep 15, 2013 at 02:49:32PM +0100, Peter Maydell wrote:
>> Yes, but if we were applying a sensible set of priorities
>> then you don't need to care at all about the contents
>> of the pci hole container, because the pci hole will
>> be at a lower priority then mcfg; so you don't get into
>> this odd corner case of "what happens if the high
>> priority container turns out not to have anything there".

> So setting sensible priorities in this case would require figuring out
> what happens on real hardware.
> As long as no one investigated, I think we are better off
> leaving this as undefined behaviour.

Well, that's your choice, but I'd be really surprised if the
PCI controller allowed PCI BARs to get mapped over the
top of builtin devices like that.

> Again, the changes you proposed yourself to support MA status bit
> means we will be using this weird feature on each and every
> PCI bus :)

It's still an odd corner case that only the PCI controller
core code needs to care about (compared to the much
larger set of container uses in random other boards and
devices we have).

-- PMM

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