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[Qemu-devel] [PATCH v2 5/7] AARCH64: Disable the non-aarch64 specific re
From: |
Mian M. Hamayun |
Subject: |
[Qemu-devel] [PATCH v2 5/7] AARCH64: Disable the non-aarch64 specific reset code |
Date: |
Tue, 23 Jul 2013 11:33:14 +0200 |
From: "Mian M. Hamayun" <address@hidden>
This commit disables the co-processor registers reset code for KVM, when
compiling for AArch64 cpus.
Signed-off-by: Mian M. Hamayun <address@hidden>
---
target-arm/kvm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index c96b871..5909d75 100644
--- a/target-arm/kvm.c
+++ b/target-arm/kvm.c
@@ -700,6 +700,7 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
void kvm_arch_reset_vcpu(CPUState *cs)
{
+#ifndef TARGET_AARCH64
/* Feed the kernel back its initial register state */
ARMCPU *cpu = ARM_CPU(cs);
@@ -709,6 +710,7 @@ void kvm_arch_reset_vcpu(CPUState *cs)
if (!write_list_to_kvmstate(cpu)) {
abort();
}
+#endif
}
bool kvm_arch_stop_on_emulation_error(CPUState *cs)
--
1.7.9.5
- [Qemu-devel] [PATCH v2 0/7] AARCH64 support on machvirt machine model using KVM, Mian M. Hamayun, 2013/07/23
- [Qemu-devel] [PATCH v2 4/7] AARCH64: Add boot support for aarch64 processor, Mian M. Hamayun, 2013/07/23
- [Qemu-devel] [PATCH v2 5/7] AARCH64: Disable the non-aarch64 specific reset code,
Mian M. Hamayun <=
- [Qemu-devel] [PATCH v2 3/7] AARCH64: Add aarch64 CPU initialization, get and put registers support, Mian M. Hamayun, 2013/07/23
- [Qemu-devel] [PATCH v2 6/7] AARCH64: Add SMP support for aarch64 processors, Mian M. Hamayun, 2013/07/23
- [Qemu-devel] [PATCH v2 7/7] AARCH64: Use the spin-table method for booting secondary processors in machvirt, Mian M. Hamayun, 2013/07/23